redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

This pull request contains Broadcom ARM-based SoC Kconfig/platform changes for 

4.12, please pull the following:
 
 - Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
   peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
   addresses > 32-bit. This is only required when ARM_LPAE is enabled
 
 - Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
   a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
   default.
 
 - Florian adds support for a new 28nm generation chip: 7260 by updating the
   runtime detection UART debuggin stub used for DEBUG_LL.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJY1VVsAAoJEIfQlpxEBwcEaMkQAKKUiXK0AP/GHTX7WcCxZO6y
 TpU1o++HEMVZP7jCfoqeSVB/wWsxRjha4GVaH/9d6xHxJMx8+gBwzok7o7mkbnDc
 sjcfZS4aRXjM8J+xPAt0GqN5gde/GP4z83Z5XR1kNFG6Ngdo4gaHRF/R3HanBWJZ
 +94K+W3RlBTBsk0NGHAjhOWpG6/a0xwRyt90bh3D/bkSB6xQIhEKvOauQ9MOdOJ2
 9X4qHYavty2VcEEsmT9dXZifR5uQ9fkx5Vsv0SujzfLPsPwK1gm8MspQ1wjg74IG
 jbxAh6gNJeWJeU5D9MtWIWTYDJSJKpNWjpkrpbRbMn88tmEsp5Pjywk7s0RogKf4
 34Nm1xt2d5ktoVP8uI8SjujGRwN4IzmcUEObTa8XiRdjRhKhHSQXGg4eIyagNt4b
 pc4HPml28n0COIZOaOHz82SlkRSSk58eyuY/RuRhduNBILpBDpS4H4sZHzLLD5qE
 msrcwElTUrIDUeQkEONq14ErqR2wxmN2PF87UBkUd5PsVBnUq8JvHldQVRJzUrrI
 ouT6P769HeJWzCcDRiorI2EIyEubVG2pEY3LGSu3W9egJ6qKVb1D+1w2gQLnsB4+
 tfxhpaTjG6EIIH29eMl18lAgNCXf7nCaDst/kxVZOSWACEhipCV+Ldke4ji3333j
 SJKzQ3fPkfX6W+m79tis
 =xKpO
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux into next/soc

Pull "Broadcom soc changes for 4.12" from Florian Fainelli:

This pull request contains Broadcom ARM-based SoC Kconfig/platform changes for
4.12, please pull the following:

- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
  peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
  addresses > 32-bit. This is only required when ARM_LPAE is enabled

- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
  a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
  default.

- Florian adds support for a new 28nm generation chip: 7260 by updating the
  runtime detection UART debuggin stub used for DEBUG_LL.

* tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux:
  ARM: brcmstb: Add entry for 7260
  ARM: brcmstb: Enable ARCH_HAS_HOLES_MEMORYMODEL
  ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals
hifive-unleashed-5.1
Arnd Bergmann 2017-03-31 10:51:42 +02:00
parent 88f31b1d5c d47b51ad31
commit b69bad75a8
2 changed files with 12 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm/include/debug/brcmstb.S
View File

@ -22,7 +22,8 @@
#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
#define UARTA_7268 REG_PHYS_ADDR(0x40c000)
#define UARTA_7260 REG_PHYS_ADDR(0x40c000)
#define UARTA_7268 UARTA_7260
#define UARTA_7271 UARTA_7268
#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
#define UARTA_7366 UARTA_7364
@ -62,13 +63,14 @@
/* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72500000, 7250)
22: checkuart(\rp, \rv, 0x72680000, 7268)
23: checkuart(\rp, \rv, 0x72710000, 7271)
24: checkuart(\rp, \rv, 0x73640000, 7364)
25: checkuart(\rp, \rv, 0x73660000, 7366)
26: checkuart(\rp, \rv, 0x07437100, 74371)
27: checkuart(\rp, \rv, 0x74390000, 7439)
28: checkuart(\rp, \rv, 0x74450000, 7445)
22: checkuart(\rp, \rv, 0x72600000, 7260)
23: checkuart(\rp, \rv, 0x72680000, 7268)
24: checkuart(\rp, \rv, 0x72710000, 7271)
25: checkuart(\rp, \rv, 0x73640000, 7364)
26: checkuart(\rp, \rv, 0x73660000, 7366)
27: checkuart(\rp, \rv, 0x07437100, 74371)
28: checkuart(\rp, \rv, 0x74390000, 7439)
29: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0

2
arch/arm/mach-bcm/Kconfig
View File

@ -198,7 +198,9 @@ config ARCH_BRCMSTB
select HAVE_ARM_ARCH_TIMER
select BRCMSTB_L2_IRQ
select BCM7120_L2_IRQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ZONE_DMA if ARM_LPAE
select SOC_BRCMSTB
select SOC_BUS
help