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ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level 

A board might not expose the USB2.0 ports, so disable them by default in SoC
file, and enable them in b2120 board.

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
hifive-unleashed-5.1
Maxime Coquelin 2015-09-23 19:53:58 +02:00
parent 759742d13c
commit b771ae27bc
2 changed files with 36 additions and 0 deletions
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24
arch/arm/boot/dts/stih410-b2120.dts
View File

@ -35,5 +35,29 @@
sd-uhs-sdr104;
sd-uhs-ddr50;
};
usb2_picophy1: phy2 {
status = "okay";
};
usb2_picophy2: phy3 {
status = "okay";
};
ohci0: usb@9a03c00 {
status = "okay";
};
ehci0: usb@9a03e00 {
status = "okay";
};
ohci1: usb@9a83c00 {
status = "okay";
};
ehci1: usb@9a83e00 {
status = "okay";
};
};
};

12
arch/arm/boot/dts/stih410.dtsi
View File

@ -22,6 +22,8 @@
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
<&picophyreset STIH407_PICOPHY0_RESET>;
reset-names = "global", "port";
status = "disabled";
};
usb2_picophy2: phy3 {
@ -31,6 +33,8 @@
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
<&picophyreset STIH407_PICOPHY1_RESET>;
reset-names = "global", "port";
status = "disabled";
};
ohci0: usb@9a03c00 {
@ -43,6 +47,8 @@
reset-names = "power", "softreset";
phys = <&usb2_picophy1>;
phy-names = "usb";
status = "disabled";
};
ehci0: usb@9a03e00 {
@ -57,6 +63,8 @@
reset-names = "power", "softreset";
phys = <&usb2_picophy1>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@9a83c00 {
@ -69,6 +77,8 @@
reset-names = "power", "softreset";
phys = <&usb2_picophy2>;
phy-names = "usb";
status = "disabled";
};
ehci1: usb@9a83e00 {
@ -83,6 +93,8 @@
reset-names = "power", "softreset";
phys = <&usb2_picophy2>;
phy-names = "usb";
status = "disabled";
};
sti-display-subsystem {