drm/radeon/kms: use helper functions for fence read/write
The existing code assumed scratch registers in a number of places while in most cases we are be using writeback and events rather than scratch registers. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -40,6 +40,35 @@
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#include "radeon.h"
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#include "radeon_trace.h"
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static void radeon_fence_write(struct radeon_device *rdev, u32 seq)
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{
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if (rdev->wb.enabled) {
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);;
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} else
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WREG32(rdev->fence_drv.scratch_reg, seq);
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}
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static u32 radeon_fence_read(struct radeon_device *rdev)
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{
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u32 seq;
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if (rdev->wb.enabled) {
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
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} else
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seq = RREG32(rdev->fence_drv.scratch_reg);
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return seq;
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}
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int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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@ -50,12 +79,12 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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return 0;
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}
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fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
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if (!rdev->cp.ready) {
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if (!rdev->cp.ready)
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/* FIXME: cp is not running assume everythings is done right
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* away
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*/
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WREG32(rdev->fence_drv.scratch_reg, fence->seq);
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} else
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radeon_fence_write(rdev, fence->seq);
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else
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radeon_fence_ring_emit(rdev, fence);
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trace_radeon_fence_emit(rdev->ddev, fence->seq);
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@ -73,15 +102,7 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev)
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bool wake = false;
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unsigned long cjiffies;
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if (rdev->wb.enabled) {
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u32 scratch_index;
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if (rdev->wb.use_event)
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scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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else
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scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
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seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
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} else
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seq = RREG32(rdev->fence_drv.scratch_reg);
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seq = radeon_fence_read(rdev);
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if (seq != rdev->fence_drv.last_seq) {
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rdev->fence_drv.last_seq = seq;
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rdev->fence_drv.last_jiffies = jiffies;
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@ -251,7 +272,7 @@ retry:
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r = radeon_gpu_reset(rdev);
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if (r)
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return r;
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WREG32(rdev->fence_drv.scratch_reg, fence->seq);
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radeon_fence_write(rdev, fence->seq);
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rdev->gpu_lockup = false;
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}
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timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
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@ -351,7 +372,7 @@ int radeon_fence_driver_init(struct radeon_device *rdev)
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write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
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return r;
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}
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WREG32(rdev->fence_drv.scratch_reg, 0);
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radeon_fence_write(rdev, 0);
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atomic_set(&rdev->fence_drv.seq, 0);
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INIT_LIST_HEAD(&rdev->fence_drv.created);
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INIT_LIST_HEAD(&rdev->fence_drv.emited);
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@ -391,7 +412,7 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
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struct radeon_fence *fence;
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seq_printf(m, "Last signaled fence 0x%08X\n",
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RREG32(rdev->fence_drv.scratch_reg));
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radeon_fence_read(rdev));
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if (!list_empty(&rdev->fence_drv.emited)) {
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fence = list_entry(rdev->fence_drv.emited.prev,
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struct radeon_fence, list);
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