ARM: dts: Add some initial IXP4xx device trees
This adds a device tree for the IXP4xx-based Linksys NSLU2 and Gateworks GW2358 which encompass the Gateworks Cambria family. These will be the first IXP4xx device tree platforms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>hifive-unleashed-5.2
Linus Walleij
parent
9540724ca2
commit
b9a35d705a
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@ -229,6 +229,9 @@ dtb-$(CONFIG_ARCH_HIX5HD2) += \
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dtb-$(CONFIG_ARCH_INTEGRATOR) += \
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integratorap.dtb \
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integratorcp.dtb
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dtb-$(CONFIG_ARCH_IXP4XX) += \
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intel-ixp42x-linksys-nslu2.dtb \
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intel-ixp43x-gateworks-gw2358.dtb
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dtb-$(CONFIG_ARCH_KEYSTONE) += \
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keystone-k2hk-evm.dtb \
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keystone-k2l-evm.dtb \
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@ -0,0 +1,109 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Linksys NSLU2
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*/
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/dts-v1/;
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#include "intel-ixp42x.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
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compatible = "linksys,nslu2", "intel,ixp42x";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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/* 32 MB SDRAM */
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device_type = "memory";
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reg = <0x00000000 0x2000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
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stdout-path = "uart0:115200n8";
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};
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aliases {
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serial0 = &uart0;
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};
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leds {
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compatible = "gpio-leds";
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led-status {
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label = "nslu2:red:status";
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-ready {
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label = "nslu2:green:ready";
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gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led-disk-1 {
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label = "nslu2:green:disk-1";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led-disk-2 {
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label = "nslu2:green:disk-2";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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button-power {
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wakeup-source;
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linux,code = <KEY_POWER>;
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label = "power";
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gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
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};
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button-reset {
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wakeup-source;
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linux,code = <KEY_ESC>;
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label = "reset";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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};
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i2c {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@6f {
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compatible = "xicor,x1205";
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reg = <0x6f>;
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};
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};
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gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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timeout-ms = <5000>;
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};
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/* The first 16MB region on the expansion bus */
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flash@50000000 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/*
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* 8 MB of Flash in 0x20000 byte blocks
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* mapped in at 0x50000000
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*/
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reg = <0x50000000 0x800000>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0x7e0000 */
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fis-index-block = <0x3f>;
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};
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};
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};
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@ -0,0 +1,25 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Intel XScale Network Processors
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* in the IXP 42x series. This series has 32 interrupts.
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*/
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#include "intel-ixp4xx.dtsi"
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/ {
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soc {
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interrupt-controller@c8003000 {
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compatible = "intel,ixp42x-interrupt";
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};
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/*
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* This is the USB Device Mode (UDC) controller, which is used
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* to present the IXP4xx as a device on a USB bus.
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*/
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usb@c800b000 {
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compatible = "intel,ixp4xx-udc";
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reg = <0xc800b000 0x1000>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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};
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};
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@ -0,0 +1,94 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Gateworks IXP43x-based Cambria GW2358
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*/
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/dts-v1/;
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#include "intel-ixp43x.dtsi"
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/ {
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model = "Gateworks Cambria GW2358";
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compatible = "gateworks,gw2358", "intel,ixp43x";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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/* 128 MB SDRAM */
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device_type = "memory";
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reg = <0x00000000 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
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stdout-path = "uart0:115200n8";
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};
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aliases {
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serial0 = &uart0;
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};
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leds {
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compatible = "gpio-leds";
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led-user {
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label = "gw2358:green:LED";
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gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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i2c {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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hwmon@28 {
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compatible = "adi,ad7418";
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reg = <0x28>;
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};
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rtc: ds1672@68 {
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compatible = "dallas,ds1672";
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reg = <0x68>;
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};
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eeprom@51 {
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compatible = "atmel,24c08";
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reg = <0x51>;
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pagesize = <16>;
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size = <1024>;
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read-only;
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};
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pld0: pld@56 {
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compatible = "gateworks,pld-gpio";
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reg = <0x56>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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/* This PLD just handles the LED and user button */
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pld1: pld@57 {
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compatible = "gateworks,pld-gpio";
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reg = <0x57>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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flash@50000000 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/*
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* 32 MB of Flash in 0x20000 byte blocks
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* mapped in at 0x50000000
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*/
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reg = <0x50000000 0x2000000>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0x1fe0000 */
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fis-index-block = <0xff>;
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};
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};
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};
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@ -0,0 +1,15 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Intel XScale Network Processors
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* in the IXP 43x series. This series has 64 interrupts and adds a few more
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* peripherals over the 42x series.
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*/
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#include "intel-ixp4xx.dtsi"
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/ {
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soc {
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interrupt-controller@c8003000 {
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compatible = "intel,ixp43x-interrupt";
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};
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};
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};
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@ -0,0 +1,34 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Intel XScale Network Processors
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* in the IXP45x and IXP46x series. This series has 64 interrupts and adds a
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* few more peripherals over the 42x and 43x series so this extends the
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* basic IXP4xx DTSI.
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*/
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#include "intel-ixp4xx.dtsi"
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/ {
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soc {
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interrupt-controller@c8003000 {
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compatible = "intel,ixp43x-interrupt";
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};
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/*
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* This is the USB Device Mode (UDC) controller, which is used
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* to present the IXP4xx as a device on a USB bus.
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*/
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usb@c800b000 {
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compatible = "intel,ixp4xx-udc";
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reg = <0xc800b000 0x1000>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c@c8011000 {
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compatible = "intel,ixp4xx-i2c";
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reg = <0xc8011000 0x18>;
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interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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};
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};
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@ -0,0 +1,58 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Intel XScale Network Processors
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* in the IXP 4xx series.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "simple-bus";
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interrupt-parent = <&intcon>;
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uart0: serial@c8000000 {
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compatible = "intel,xscale-uart";
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reg = <0xc8000000 0x1000>;
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/*
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* The reg-offset and reg-shift is a side effect
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* of running the platform in big endian mode.
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*/
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reg-offset = <3>;
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reg-shift = <2>;
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <14745600>;
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no-loopback-test;
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};
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gpio0: gpio@c8004000 {
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compatible = "intel,ixp4xx-gpio";
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reg = <0xc8004000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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intcon: interrupt-controller@c8003000 {
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/*
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* Note: no compatible string. The subvariant of the
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* chip needs to define what version it is. The
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* location of the interrupt controller is fixed in
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* memory across all variants.
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*/
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reg = <0xc8003000 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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timer@c8005000 {
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compatible = "intel,ixp4xx-timer";
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reg = <0xc8005000 0x100>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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