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Blackfin: bfin_spi.h: add MMR peripheral layout

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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2010-10-22 05:11:08 +00:00
parent fec84d21c5
commit b9ac41e314
1 changed files with 19 additions and 0 deletions
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19
arch/blackfin/include/asm/bfin5xx_spi.h
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@ -41,6 +41,25 @@
#define BIT_STU_SENDOVER 0x0001
#define BIT_STU_RECVFULL 0x0020
/*
* All Blackfin system MMRs are padded to 32bits even if the register
* itself is only 16bits. So use a helper macro to streamline this.
*/
#define __BFP(m) u16 m; u16 __pad_##m
/*
* bfin spi registers layout
*/
struct bfin_spi_regs {
__BFP(ctl);
__BFP(flg);
__BFP(stat);
__BFP(tdbr);
__BFP(rdbr);
__BFP(baud);
__BFP(shadow);
};
#define MAX_CTRL_CS 8 /* cs in spi controller */
/* device.platform_data for SSP controller devices */