sun6i: dsi: Convert to generic phy handling
Now that we have everything in place in the PHY framework to deal in a generic way with MIPI D-PHY phys, let's convert our PHY driver and its associated DSI driver to that new API. Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/dc6450e2978b6dafcc464595ad06204d22d2658f.1548085432.git-series.maxime.ripard@bootlin.com
This commit is contained in:
Maxime Ripard
parent
1eb6ea4a82
commit
bb3b6fcb68
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@ -45,10 +45,19 @@ config DRM_SUN6I_DSI
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default MACH_SUN8I
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select CRC_CCITT
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select DRM_MIPI_DSI
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select DRM_SUN6I_DPHY
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help
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Choose this option if you want have an Allwinner SoC with
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MIPI-DSI support. If M is selected the module will be called
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sun6i-dsi
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sun6i_mipi_dsi.
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config DRM_SUN6I_DPHY
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tristate "Allwinner A31 MIPI D-PHY Support"
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select GENERIC_PHY_MIPI_DPHY
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help
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Choose this option if you have an Allwinner SoC with
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MIPI-DSI support. If M is selected, the module will be
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called sun6i_mipi_dphy.
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config DRM_SUN8I_DW_HDMI
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tristate "Support for Allwinner version of DesignWare HDMI"
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@ -24,9 +24,6 @@ sun4i-tcon-y += sun4i_lvds.o
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sun4i-tcon-y += sun4i_tcon.o
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sun4i-tcon-y += sun4i_rgb.o
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sun6i-dsi-y += sun6i_mipi_dphy.o
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sun6i-dsi-y += sun6i_mipi_dsi.o
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obj-$(CONFIG_DRM_SUN4I) += sun4i-drm.o
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obj-$(CONFIG_DRM_SUN4I) += sun4i-tcon.o
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obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o
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@ -37,7 +34,8 @@ ifdef CONFIG_DRM_SUN4I_BACKEND
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obj-$(CONFIG_DRM_SUN4I) += sun4i-frontend.o
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endif
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obj-$(CONFIG_DRM_SUN4I_HDMI) += sun4i-drm-hdmi.o
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obj-$(CONFIG_DRM_SUN6I_DSI) += sun6i-dsi.o
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obj-$(CONFIG_DRM_SUN6I_DPHY) += sun6i_mipi_dphy.o
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obj-$(CONFIG_DRM_SUN6I_DSI) += sun6i_mipi_dsi.o
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obj-$(CONFIG_DRM_SUN8I_DW_HDMI) += sun8i-drm-hdmi.o
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obj-$(CONFIG_DRM_SUN8I_MIXER) += sun8i-mixer.o
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obj-$(CONFIG_DRM_SUN8I_TCON_TOP) += sun8i_tcon_top.o
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@ -8,11 +8,14 @@
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include "sun6i_mipi_dsi.h"
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#include <linux/phy/phy.h>
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#include <linux/phy/phy-mipi-dphy.h>
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#define SUN6I_DPHY_GCTL_REG 0x00
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#define SUN6I_DPHY_GCTL_LANE_NUM(n) ((((n) - 1) & 3) << 4)
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@ -81,12 +84,46 @@
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#define SUN6I_DPHY_DBG5_REG 0xf4
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int sun6i_dphy_init(struct sun6i_dphy *dphy, unsigned int lanes)
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struct sun6i_dphy {
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struct clk *bus_clk;
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struct clk *mod_clk;
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struct regmap *regs;
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struct reset_control *reset;
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struct phy *phy;
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struct phy_configure_opts_mipi_dphy config;
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};
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static int sun6i_dphy_init(struct phy *phy)
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{
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struct sun6i_dphy *dphy = phy_get_drvdata(phy);
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reset_control_deassert(dphy->reset);
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clk_prepare_enable(dphy->mod_clk);
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clk_set_rate_exclusive(dphy->mod_clk, 150000000);
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return 0;
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}
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static int sun6i_dphy_configure(struct phy *phy, union phy_configure_opts *opts)
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{
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struct sun6i_dphy *dphy = phy_get_drvdata(phy);
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int ret;
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ret = phy_mipi_dphy_config_validate(&opts->mipi_dphy);
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if (ret)
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return ret;
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memcpy(&dphy->config, opts, sizeof(dphy->config));
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return 0;
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}
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static int sun6i_dphy_power_on(struct phy *phy)
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{
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struct sun6i_dphy *dphy = phy_get_drvdata(phy);
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u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
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regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
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SUN6I_DPHY_TX_CTL_HS_TX_CLK_CONT);
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@ -111,16 +148,9 @@ int sun6i_dphy_init(struct sun6i_dphy *dphy, unsigned int lanes)
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SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(3));
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regmap_write(dphy->regs, SUN6I_DPHY_GCTL_REG,
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SUN6I_DPHY_GCTL_LANE_NUM(lanes) |
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SUN6I_DPHY_GCTL_LANE_NUM(dphy->config.lanes) |
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SUN6I_DPHY_GCTL_EN);
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return 0;
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}
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int sun6i_dphy_power_on(struct sun6i_dphy *dphy, unsigned int lanes)
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{
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u8 lanes_mask = GENMASK(lanes - 1, 0);
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regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG,
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SUN6I_DPHY_ANA0_REG_PWS |
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SUN6I_DPHY_ANA0_REG_DMPC |
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@ -181,16 +211,20 @@ int sun6i_dphy_power_on(struct sun6i_dphy *dphy, unsigned int lanes)
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return 0;
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}
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int sun6i_dphy_power_off(struct sun6i_dphy *dphy)
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static int sun6i_dphy_power_off(struct phy *phy)
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{
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struct sun6i_dphy *dphy = phy_get_drvdata(phy);
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regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA1_REG,
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SUN6I_DPHY_ANA1_REG_VTTMODE, 0);
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return 0;
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}
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int sun6i_dphy_exit(struct sun6i_dphy *dphy)
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static int sun6i_dphy_exit(struct phy *phy)
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{
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struct sun6i_dphy *dphy = phy_get_drvdata(phy);
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clk_rate_exclusive_put(dphy->mod_clk);
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clk_disable_unprepare(dphy->mod_clk);
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reset_control_assert(dphy->reset);
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@ -198,6 +232,15 @@ int sun6i_dphy_exit(struct sun6i_dphy *dphy)
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return 0;
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}
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static struct phy_ops sun6i_dphy_ops = {
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.configure = sun6i_dphy_configure,
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.power_on = sun6i_dphy_power_on,
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.power_off = sun6i_dphy_power_off,
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.init = sun6i_dphy_init,
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.exit = sun6i_dphy_exit,
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};
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static struct regmap_config sun6i_dphy_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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@ -206,87 +249,70 @@ static struct regmap_config sun6i_dphy_regmap_config = {
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.name = "mipi-dphy",
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};
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static int sun6i_dphy_probe(struct platform_device *pdev)
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{
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struct phy_provider *phy_provider;
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struct sun6i_dphy *dphy;
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struct resource *res;
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void __iomem *regs;
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dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL);
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if (!dphy)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs)) {
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dev_err(&pdev->dev, "Couldn't map the DPHY encoder registers\n");
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return PTR_ERR(regs);
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}
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dphy->regs = devm_regmap_init_mmio_clk(&pdev->dev, "bus",
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regs, &sun6i_dphy_regmap_config);
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if (IS_ERR(dphy->regs)) {
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dev_err(&pdev->dev, "Couldn't create the DPHY encoder regmap\n");
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return PTR_ERR(dphy->regs);
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}
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dphy->reset = devm_reset_control_get_shared(&pdev->dev, NULL);
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if (IS_ERR(dphy->reset)) {
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dev_err(&pdev->dev, "Couldn't get our reset line\n");
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return PTR_ERR(dphy->reset);
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}
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dphy->mod_clk = devm_clk_get(&pdev->dev, "mod");
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if (IS_ERR(dphy->mod_clk)) {
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dev_err(&pdev->dev, "Couldn't get the DPHY mod clock\n");
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return PTR_ERR(dphy->mod_clk);
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}
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dphy->phy = devm_phy_create(&pdev->dev, NULL, &sun6i_dphy_ops);
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if (IS_ERR(dphy->phy)) {
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dev_err(&pdev->dev, "failed to create PHY\n");
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return PTR_ERR(dphy->phy);
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}
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phy_set_drvdata(dphy->phy, dphy);
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phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id sun6i_dphy_of_table[] = {
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{ .compatible = "allwinner,sun6i-a31-mipi-dphy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, sun6i_dphy_of_table);
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int sun6i_dphy_probe(struct sun6i_dsi *dsi, struct device_node *node)
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{
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struct sun6i_dphy *dphy;
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struct resource res;
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void __iomem *regs;
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int ret;
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static struct platform_driver sun6i_dphy_platform_driver = {
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.probe = sun6i_dphy_probe,
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.driver = {
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.name = "sun6i-mipi-dphy",
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.of_match_table = sun6i_dphy_of_table,
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},
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};
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module_platform_driver(sun6i_dphy_platform_driver);
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if (!of_match_node(sun6i_dphy_of_table, node)) {
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dev_err(dsi->dev, "Incompatible D-PHY\n");
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return -EINVAL;
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}
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dphy = devm_kzalloc(dsi->dev, sizeof(*dphy), GFP_KERNEL);
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if (!dphy)
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return -ENOMEM;
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ret = of_address_to_resource(node, 0, &res);
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if (ret) {
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dev_err(dsi->dev, "phy: Couldn't get our resources\n");
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return ret;
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}
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regs = devm_ioremap_resource(dsi->dev, &res);
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if (IS_ERR(regs)) {
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dev_err(dsi->dev, "Couldn't map the DPHY encoder registers\n");
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return PTR_ERR(regs);
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}
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dphy->regs = devm_regmap_init_mmio(dsi->dev, regs,
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&sun6i_dphy_regmap_config);
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if (IS_ERR(dphy->regs)) {
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dev_err(dsi->dev, "Couldn't create the DPHY encoder regmap\n");
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return PTR_ERR(dphy->regs);
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}
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dphy->reset = of_reset_control_get_shared(node, NULL);
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if (IS_ERR(dphy->reset)) {
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dev_err(dsi->dev, "Couldn't get our reset line\n");
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return PTR_ERR(dphy->reset);
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}
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dphy->bus_clk = of_clk_get_by_name(node, "bus");
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if (IS_ERR(dphy->bus_clk)) {
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dev_err(dsi->dev, "Couldn't get the DPHY bus clock\n");
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ret = PTR_ERR(dphy->bus_clk);
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goto err_free_reset;
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}
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regmap_mmio_attach_clk(dphy->regs, dphy->bus_clk);
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dphy->mod_clk = of_clk_get_by_name(node, "mod");
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if (IS_ERR(dphy->mod_clk)) {
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dev_err(dsi->dev, "Couldn't get the DPHY mod clock\n");
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ret = PTR_ERR(dphy->mod_clk);
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goto err_free_bus;
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}
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dsi->dphy = dphy;
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return 0;
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err_free_bus:
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regmap_mmio_detach_clk(dphy->regs);
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clk_put(dphy->bus_clk);
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err_free_reset:
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reset_control_put(dphy->reset);
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return ret;
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}
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int sun6i_dphy_remove(struct sun6i_dsi *dsi)
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{
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struct sun6i_dphy *dphy = dsi->dphy;
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regmap_mmio_detach_clk(dphy->regs);
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clk_put(dphy->mod_clk);
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clk_put(dphy->bus_clk);
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reset_control_put(dphy->reset);
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return 0;
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}
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MODULE_AUTHOR("Maxime Ripard <maxime.ripard@bootlin>");
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MODULE_DESCRIPTION("Allwinner A31 MIPI D-PHY Driver");
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MODULE_LICENSE("GPL");
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@ -16,6 +16,7 @@
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#include <linux/slab.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/phy-mipi-dphy.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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@ -616,6 +617,8 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
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struct mipi_dsi_device *device = dsi->device;
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union phy_configure_opts opts = { 0 };
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struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
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u16 delay;
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DRM_DEBUG_DRIVER("Enabling DSI output\n");
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@ -634,8 +637,15 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder)
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sun6i_dsi_setup_format(dsi, mode);
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sun6i_dsi_setup_timings(dsi, mode);
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sun6i_dphy_init(dsi->dphy, device->lanes);
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sun6i_dphy_power_on(dsi->dphy, device->lanes);
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phy_init(dsi->dphy);
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phy_mipi_dphy_get_default_config(mode->clock * 1000,
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mipi_dsi_pixel_format_to_bpp(device->format),
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device->lanes, cfg);
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phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY);
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phy_configure(dsi->dphy, &opts);
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phy_power_on(dsi->dphy);
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if (!IS_ERR(dsi->panel))
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drm_panel_prepare(dsi->panel);
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@ -673,8 +683,8 @@ static void sun6i_dsi_encoder_disable(struct drm_encoder *encoder)
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drm_panel_unprepare(dsi->panel);
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}
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sun6i_dphy_power_off(dsi->dphy);
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sun6i_dphy_exit(dsi->dphy);
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phy_power_off(dsi->dphy);
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phy_exit(dsi->dphy);
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pm_runtime_put(dsi->dev);
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}
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@ -967,7 +977,6 @@ static const struct component_ops sun6i_dsi_ops = {
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static int sun6i_dsi_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *dphy_node;
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struct sun6i_dsi *dsi;
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struct resource *res;
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void __iomem *base;
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@ -1013,10 +1022,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
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*/
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clk_set_rate_exclusive(dsi->mod_clk, 297000000);
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dphy_node = of_parse_phandle(dev->of_node, "phys", 0);
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ret = sun6i_dphy_probe(dsi, dphy_node);
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of_node_put(dphy_node);
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if (ret) {
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dsi->dphy = devm_phy_get(dev, "dphy");
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if (IS_ERR(dsi->dphy)) {
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dev_err(dev, "Couldn't get the MIPI D-PHY\n");
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goto err_unprotect_clk;
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}
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@ -1026,7 +1033,7 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
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ret = mipi_dsi_host_register(&dsi->host);
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if (ret) {
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dev_err(dev, "Couldn't register MIPI-DSI host\n");
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goto err_remove_phy;
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goto err_pm_disable;
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}
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ret = component_add(&pdev->dev, &sun6i_dsi_ops);
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@ -1039,9 +1046,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev)
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err_remove_dsi_host:
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mipi_dsi_host_unregister(&dsi->host);
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err_remove_phy:
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err_pm_disable:
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pm_runtime_disable(dev);
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sun6i_dphy_remove(dsi);
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err_unprotect_clk:
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clk_rate_exclusive_put(dsi->mod_clk);
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return ret;
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@ -1055,7 +1061,6 @@ static int sun6i_dsi_remove(struct platform_device *pdev)
|
|||
component_del(&pdev->dev, &sun6i_dsi_ops);
|
||||
mipi_dsi_host_unregister(&dsi->host);
|
||||
pm_runtime_disable(dev);
|
||||
sun6i_dphy_remove(dsi);
|
||||
clk_rate_exclusive_put(dsi->mod_clk);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -13,13 +13,6 @@
|
|||
#include <drm/drm_encoder.h>
|
||||
#include <drm/drm_mipi_dsi.h>
|
||||
|
||||
struct sun6i_dphy {
|
||||
struct clk *bus_clk;
|
||||
struct clk *mod_clk;
|
||||
struct regmap *regs;
|
||||
struct reset_control *reset;
|
||||
};
|
||||
|
||||
struct sun6i_dsi {
|
||||
struct drm_connector connector;
|
||||
struct drm_encoder encoder;
|
||||
|
|
@ -29,7 +22,7 @@ struct sun6i_dsi {
|
|||
struct clk *mod_clk;
|
||||
struct regmap *regs;
|
||||
struct reset_control *reset;
|
||||
struct sun6i_dphy *dphy;
|
||||
struct phy *dphy;
|
||||
|
||||
struct device *dev;
|
||||
struct sun4i_drv *drv;
|
||||
|
|
@ -52,12 +45,4 @@ static inline struct sun6i_dsi *encoder_to_sun6i_dsi(const struct drm_encoder *e
|
|||
return container_of(encoder, struct sun6i_dsi, encoder);
|
||||
};
|
||||
|
||||
int sun6i_dphy_probe(struct sun6i_dsi *dsi, struct device_node *node);
|
||||
int sun6i_dphy_remove(struct sun6i_dsi *dsi);
|
||||
|
||||
int sun6i_dphy_init(struct sun6i_dphy *dphy, unsigned int lanes);
|
||||
int sun6i_dphy_power_on(struct sun6i_dphy *dphy, unsigned int lanes);
|
||||
int sun6i_dphy_power_off(struct sun6i_dphy *dphy);
|
||||
int sun6i_dphy_exit(struct sun6i_dphy *dphy);
|
||||
|
||||
#endif /* _SUN6I_MIPI_DSI_H_ */
|
||||
|
|
|
|||
Loading…
Reference in a new issue