arm64: dts: hi3798cv200: enable emmc support for poplar board
It adds pinctrl device pinconf@8a21000, gpio-ranges for GPIO devices, and then enables eMMC support for Hi3798CV200 Poplar board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>hifive-unleashed-5.1
Shawn Guo
Wei Xu
parent
e83474c657
commit
bb61c53601
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@ -11,6 +11,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include "hi3798cv200.dtsi"
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#include "poplar-pinctrl.dtsi"
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/ {
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model = "HiSilicon Poplar Development Board";
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@ -76,6 +77,20 @@
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status = "okay";
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};
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&emmc {
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_pins_1 &emmc_pins_2
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&emmc_pins_3 &emmc_pins_4>;
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fifo-depth = <256>;
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clock-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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non-removable;
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bus-width = <8>;
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status = "okay";
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};
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&gmac1 {
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status = "okay";
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#address-cells = <1>;
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@ -175,6 +175,46 @@
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};
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};
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pmx0: pinconf@8a21000 {
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compatible = "pinconf-single";
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reg = <0x8a21000 0x180>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <7>;
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pinctrl-single,gpio-range = <
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&range 0 8 2 /* GPIO 0 */
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&range 8 1 0 /* GPIO 1 */
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&range 9 4 2
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&range 13 1 0
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&range 14 1 1
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&range 15 1 0
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&range 16 5 0 /* GPIO 2 */
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&range 21 3 1
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&range 24 4 1 /* GPIO 3 */
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&range 28 2 2
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&range 86 1 1
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&range 87 1 0
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&range 30 4 2 /* GPIO 4 */
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&range 34 3 0
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&range 37 1 2
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&range 38 3 2 /* GPIO 6 */
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&range 41 5 0
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&range 46 8 1 /* GPIO 7 */
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&range 54 8 1 /* GPIO 8 */
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&range 64 7 1 /* GPIO 9 */
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&range 71 1 0
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&range 72 6 1 /* GPIO 10 */
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&range 78 1 0
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&range 79 1 1
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&range 80 6 1 /* GPIO 11 */
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&range 70 2 1
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&range 88 8 0 /* GPIO 12 */
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>;
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range: gpio-range {
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#pinctrl-single,gpio-range-cells = <3>;
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};
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};
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uart0: serial@8b00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x8b00000 0x1000>;
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@ -274,12 +314,17 @@
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};
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emmc: mmc@9830000 {
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compatible = "snps,dw-mshc";
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compatible = "hisilicon,hi3798cv200-dw-mshc";
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reg = <0x9830000 0x10000>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_MMC_CIU_CLK>,
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<&crg HISTB_MMC_BIU_CLK>;
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clock-names = "ciu", "biu";
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<&crg HISTB_MMC_BIU_CLK>,
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<&crg HISTB_MMC_SAMPLE_CLK>,
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<&crg HISTB_MMC_DRV_CLK>;
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clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
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resets = <&crg 0xa0 4>;
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reset-names = "reset";
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status = "disabled";
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};
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gpio0: gpio@8b20000 {
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@ -290,6 +335,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 0 8>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -303,6 +349,13 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <
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&pmx0 0 8 1
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&pmx0 1 9 4
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&pmx0 5 13 1
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&pmx0 6 14 1
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&pmx0 7 15 1
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>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -316,6 +369,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 16 5 &pmx0 5 21 3>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -329,6 +383,12 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <
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&pmx0 0 24 4
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&pmx0 4 28 2
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&pmx0 6 86 1
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&pmx0 7 87 1
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>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -342,6 +402,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 30 4 &pmx0 4 34 3 &pmx0 7 37 1>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -368,6 +429,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 38 3 &pmx0 0 41 5>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -381,6 +443,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 46 8>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -394,6 +457,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 54 8>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -407,6 +471,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 64 7 &pmx0 71 1>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -420,6 +485,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 72 6 &pmx0 6 78 1 &pmx0 7 79 1>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -433,6 +499,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 80 6 &pmx0 6 70 2>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -446,6 +513,7 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pmx0 0 88 8>;
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clocks = <&crg HISTB_APB_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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@ -0,0 +1,98 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Pinctrl dts file for HiSilicon Poplar board
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*
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* Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
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*/
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#include <dt-bindings/pinctrl/hisi.h>
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/* value, enable bits, disable bits, mask */
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#define PINCTRL_PULLDOWN(value, enable, disable, mask) \
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(value << 13) (enable << 13) (disable << 13) (mask << 13)
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#define PINCTRL_PULLUP(value, enable, disable, mask) \
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(value << 12) (enable << 12) (disable << 12) (mask << 12)
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#define PINCTRL_SLEW_RATE(value, mask) (value << 8) (mask << 8)
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#define PINCTRL_DRV_STRENGTH(value, mask) (value << 4) (mask << 4)
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&pmx0 {
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emmc_pins_1: emmc-pins-1 {
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pinctrl-single,pins = <
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0x000 MUX_M2
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0x004 MUX_M2
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0x008 MUX_M2
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0x00c MUX_M2
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0x010 MUX_M2
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0x014 MUX_M2
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0x018 MUX_M2
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0x01c MUX_M2
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0x024 MUX_M2
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>;
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pinctrl-single,bias-pulldown = <
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PINCTRL_PULLDOWN(0, 1, 0, 1)
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>;
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pinctrl-single,bias-pullup = <
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PINCTRL_PULLUP(0, 1, 0, 1)
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>;
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pinctrl-single,slew-rate = <
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PINCTRL_SLEW_RATE(1, 1)
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>;
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pinctrl-single,drive-strength = <
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PINCTRL_DRV_STRENGTH(0xb, 0xf)
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>;
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};
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emmc_pins_2: emmc-pins-2 {
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pinctrl-single,pins = <
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0x028 MUX_M2
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>;
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pinctrl-single,bias-pulldown = <
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PINCTRL_PULLDOWN(0, 1, 0, 1)
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>;
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pinctrl-single,bias-pullup = <
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PINCTRL_PULLUP(0, 1, 0, 1)
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>;
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pinctrl-single,slew-rate = <
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PINCTRL_SLEW_RATE(1, 1)
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>;
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pinctrl-single,drive-strength = <
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PINCTRL_DRV_STRENGTH(0x9, 0xf)
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>;
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};
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emmc_pins_3: emmc-pins-3 {
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pinctrl-single,pins = <
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0x02c MUX_M2
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>;
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pinctrl-single,bias-pulldown = <
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PINCTRL_PULLDOWN(0, 1, 0, 1)
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>;
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pinctrl-single,bias-pullup = <
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PINCTRL_PULLUP(0, 1, 0, 1)
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>;
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pinctrl-single,slew-rate = <
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PINCTRL_SLEW_RATE(1, 1)
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>;
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pinctrl-single,drive-strength = <
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PINCTRL_DRV_STRENGTH(3, 3)
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>;
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};
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emmc_pins_4: emmc-pins-4 {
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pinctrl-single,pins = <
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0x030 MUX_M2
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>;
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pinctrl-single,bias-pulldown = <
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PINCTRL_PULLDOWN(1, 1, 0, 1)
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>;
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pinctrl-single,bias-pullup = <
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PINCTRL_PULLUP(0, 1, 0, 1)
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>;
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pinctrl-single,slew-rate = <
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PINCTRL_SLEW_RATE(1, 1)
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>;
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pinctrl-single,drive-strength = <
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PINCTRL_DRV_STRENGTH(3, 3)
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>;
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};
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};
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