i2c: i2c-stm32: Add generic DMA API
This patch adds a generic DMA API to implement DMA support for i2c-stm32fx drivers Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>hifive-unleashed-5.1
Pierre-Yves MORDRET
Wolfram Sang
parent
9e48155f6b
commit
bb8822cbbc
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@ -0,0 +1,153 @@
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/*
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* i2c-stm32.c
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*
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* Copyright (C) M'boumba Cedric Madianga 2017
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* Author: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
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*
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include "i2c-stm32.h"
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/* Functions for DMA support */
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struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
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dma_addr_t phy_addr,
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u32 txdr_offset,
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u32 rxdr_offset)
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{
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struct stm32_i2c_dma *dma;
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struct dma_slave_config dma_sconfig;
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int ret;
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dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
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if (!dma)
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return NULL;
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/* Request and configure I2C TX dma channel */
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dma->chan_tx = dma_request_slave_channel(dev, "tx");
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if (!dma->chan_tx) {
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dev_dbg(dev, "can't request DMA tx channel\n");
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ret = -EINVAL;
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goto fail_al;
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}
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memset(&dma_sconfig, 0, sizeof(dma_sconfig));
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dma_sconfig.dst_addr = phy_addr + txdr_offset;
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dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma_sconfig.dst_maxburst = 1;
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dma_sconfig.direction = DMA_MEM_TO_DEV;
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ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig);
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if (ret < 0) {
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dev_err(dev, "can't configure tx channel\n");
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goto fail_tx;
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}
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/* Request and configure I2C RX dma channel */
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dma->chan_rx = dma_request_slave_channel(dev, "rx");
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if (!dma->chan_rx) {
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dev_err(dev, "can't request DMA rx channel\n");
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ret = -EINVAL;
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goto fail_tx;
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}
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memset(&dma_sconfig, 0, sizeof(dma_sconfig));
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dma_sconfig.src_addr = phy_addr + rxdr_offset;
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dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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dma_sconfig.src_maxburst = 1;
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dma_sconfig.direction = DMA_DEV_TO_MEM;
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ret = dmaengine_slave_config(dma->chan_rx, &dma_sconfig);
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if (ret < 0) {
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dev_err(dev, "can't configure rx channel\n");
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goto fail_rx;
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}
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init_completion(&dma->dma_complete);
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dev_info(dev, "using %s (tx) and %s (rx) for DMA transfers\n",
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dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx));
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return dma;
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fail_rx:
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dma_release_channel(dma->chan_rx);
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fail_tx:
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dma_release_channel(dma->chan_tx);
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fail_al:
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devm_kfree(dev, dma);
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dev_info(dev, "can't use DMA\n");
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return NULL;
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}
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void stm32_i2c_dma_free(struct stm32_i2c_dma *dma)
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{
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dma->dma_buf = 0;
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dma->dma_len = 0;
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dma_release_channel(dma->chan_tx);
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dma->chan_tx = NULL;
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dma_release_channel(dma->chan_rx);
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dma->chan_rx = NULL;
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dma->chan_using = NULL;
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}
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int stm32_i2c_prep_dma_xfer(struct device *dev, struct stm32_i2c_dma *dma,
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bool rd_wr, u32 len, u8 *buf,
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dma_async_tx_callback callback,
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void *dma_async_param)
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{
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struct dma_async_tx_descriptor *txdesc;
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struct device *chan_dev;
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int ret;
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if (rd_wr) {
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dma->chan_using = dma->chan_rx;
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dma->dma_transfer_dir = DMA_DEV_TO_MEM;
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dma->dma_data_dir = DMA_FROM_DEVICE;
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} else {
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dma->chan_using = dma->chan_tx;
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dma->dma_transfer_dir = DMA_MEM_TO_DEV;
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dma->dma_data_dir = DMA_TO_DEVICE;
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}
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dma->dma_len = len;
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chan_dev = dma->chan_using->device->dev;
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dma->dma_buf = dma_map_single(chan_dev, buf, dma->dma_len,
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dma->dma_data_dir);
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if (dma_mapping_error(chan_dev, dma->dma_buf)) {
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dev_err(dev, "DMA mapping failed\n");
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return -EINVAL;
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}
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txdesc = dmaengine_prep_slave_single(dma->chan_using, dma->dma_buf,
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dma->dma_len,
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dma->dma_transfer_dir,
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DMA_PREP_INTERRUPT);
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if (!txdesc) {
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dev_err(dev, "Not able to get desc for DMA xfer\n");
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ret = -EINVAL;
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goto err;
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}
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reinit_completion(&dma->dma_complete);
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txdesc->callback = callback;
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txdesc->callback_param = dma_async_param;
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ret = dma_submit_error(dmaengine_submit(txdesc));
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if (ret < 0) {
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dev_err(dev, "DMA submit failed\n");
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goto err;
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}
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dma_async_issue_pending(dma->chan_using);
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return 0;
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err:
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dma_unmap_single(chan_dev, dma->dma_buf, dma->dma_len,
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dma->dma_data_dir);
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return ret;
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}
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@ -11,6 +11,10 @@
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#ifndef _I2C_STM32_H
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#define _I2C_STM32_H
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#include <linux/dma-direction.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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enum stm32_i2c_speed {
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STM32_I2C_SPEED_STANDARD, /* 100 kHz */
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STM32_I2C_SPEED_FAST, /* 400 kHz */
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@ -18,4 +22,37 @@ enum stm32_i2c_speed {
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STM32_I2C_SPEED_END,
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};
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/**
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* struct stm32_i2c_dma - DMA specific data
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* @chan_tx: dma channel for TX transfer
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* @chan_rx: dma channel for RX transfer
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* @chan_using: dma channel used for the current transfer (TX or RX)
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* @dma_buf: dma buffer
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* @dma_len: dma buffer len
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* @dma_transfer_dir: dma transfer direction indicator
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* @dma_data_dir: dma transfer mode indicator
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* @dma_complete: dma transfer completion
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*/
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struct stm32_i2c_dma {
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struct dma_chan *chan_tx;
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struct dma_chan *chan_rx;
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struct dma_chan *chan_using;
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dma_addr_t dma_buf;
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unsigned int dma_len;
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enum dma_transfer_direction dma_transfer_dir;
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enum dma_data_direction dma_data_dir;
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struct completion dma_complete;
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};
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struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
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dma_addr_t phy_addr,
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u32 txdr_offset, u32 rxdr_offset);
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void stm32_i2c_dma_free(struct stm32_i2c_dma *dma);
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int stm32_i2c_prep_dma_xfer(struct device *dev, struct stm32_i2c_dma *dma,
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bool rd_wr, u32 len, u8 *buf,
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dma_async_tx_callback callback,
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void *dma_async_param);
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#endif /* _I2C_STM32_H */
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