Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "A couple of fixes and updates related to x86: - Fix the W+X check regression on XEN - The real fix for the low identity map trainwreck - Probe legacy PIC early instead of unconditionally allocating legacy irqs - Add cpu verification to long mode entry - Adjust the cache topology to AMD Fam17H systems - Let Merrifield use the TSC across S3" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Call verify_cpu() after having entered long mode too x86/setup: Fix low identity map for >= 2GB kernel range x86/mm: Skip the hypervisor range when walking PGD x86/AMD: Fix last level cache topology for AMD Fam17h systems x86/irq: Probe for PIC presence before allocating descs for legacy IRQs x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifieldhifive-unleashed-5.1
commit
bba072dfd7
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@ -60,6 +60,7 @@ struct legacy_pic {
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void (*mask_all)(void);
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void (*mask_all)(void);
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void (*restore_mask)(void);
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void (*restore_mask)(void);
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void (*init)(int auto_eoi);
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void (*init)(int auto_eoi);
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int (*probe)(void);
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int (*irq_pending)(unsigned int irq);
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int (*irq_pending)(unsigned int irq);
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void (*make_irq)(unsigned int irq);
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void (*make_irq)(unsigned int irq);
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};
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};
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@ -361,7 +361,11 @@ int __init arch_probe_nr_irqs(void)
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if (nr < nr_irqs)
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if (nr < nr_irqs)
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nr_irqs = nr;
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nr_irqs = nr;
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return nr_legacy_irqs();
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/*
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* We don't know if PIC is present at this point so we need to do
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* probe() to get the right number of legacy IRQs.
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*/
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return legacy_pic->probe();
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}
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}
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#ifdef CONFIG_X86_IO_APIC
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#ifdef CONFIG_X86_IO_APIC
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@ -352,6 +352,7 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c)
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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unsigned bits;
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unsigned bits;
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int cpu = smp_processor_id();
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int cpu = smp_processor_id();
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unsigned int socket_id, core_complex_id;
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bits = c->x86_coreid_bits;
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bits = c->x86_coreid_bits;
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/* Low order bits define the core id (index of core in socket) */
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/* Low order bits define the core id (index of core in socket) */
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@ -361,6 +362,18 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c)
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/* use socket ID also for last level cache */
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/* use socket ID also for last level cache */
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per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
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per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
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amd_get_topology(c);
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amd_get_topology(c);
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/*
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* Fix percpu cpu_llc_id here as LLC topology is different
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* for Fam17h systems.
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*/
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if (c->x86 != 0x17 || !cpuid_edx(0x80000006))
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return;
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socket_id = (c->apicid >> bits) - 1;
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core_complex_id = (c->apicid & ((1 << bits) - 1)) >> 3;
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per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;
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#endif
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#endif
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}
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}
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@ -97,6 +97,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
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switch (c->x86_model) {
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switch (c->x86_model) {
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case 0x27: /* Penwell */
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case 0x27: /* Penwell */
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case 0x35: /* Cloverview */
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case 0x35: /* Cloverview */
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case 0x4a: /* Merrifield */
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set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
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set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
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break;
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break;
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default:
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default:
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@ -65,6 +65,9 @@ startup_64:
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* tables and then reload them.
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* tables and then reload them.
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*/
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*/
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/* Sanitize CPU configuration */
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call verify_cpu
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/*
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/*
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* Compute the delta between the address I am compiled to run at and the
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* Compute the delta between the address I am compiled to run at and the
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* address I am actually running at.
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* address I am actually running at.
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@ -174,6 +177,9 @@ ENTRY(secondary_startup_64)
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* after the boot processor executes this code.
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* after the boot processor executes this code.
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*/
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*/
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/* Sanitize CPU configuration */
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call verify_cpu
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movq $(init_level4_pgt - __START_KERNEL_map), %rax
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movq $(init_level4_pgt - __START_KERNEL_map), %rax
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1:
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1:
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@ -288,6 +294,8 @@ ENTRY(secondary_startup_64)
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pushq %rax # target address in negative space
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pushq %rax # target address in negative space
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lretq
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lretq
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#include "verify_cpu.S"
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#ifdef CONFIG_HOTPLUG_CPU
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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/*
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* Boot CPU0 entry point. It's called from play_dead(). Everything has been set
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* Boot CPU0 entry point. It's called from play_dead(). Everything has been set
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@ -295,16 +295,11 @@ static void unmask_8259A(void)
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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}
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}
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static void init_8259A(int auto_eoi)
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static int probe_8259A(void)
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{
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{
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unsigned long flags;
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unsigned long flags;
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unsigned char probe_val = ~(1 << PIC_CASCADE_IR);
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unsigned char probe_val = ~(1 << PIC_CASCADE_IR);
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unsigned char new_val;
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unsigned char new_val;
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i8259A_auto_eoi = auto_eoi;
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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/*
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/*
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* Check to see if we have a PIC.
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* Check to see if we have a PIC.
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* Mask all except the cascade and read
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* Mask all except the cascade and read
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@ -312,16 +307,28 @@ static void init_8259A(int auto_eoi)
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* have a PIC, we will read 0xff as opposed to the
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* have a PIC, we will read 0xff as opposed to the
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* value we wrote.
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* value we wrote.
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*/
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*/
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
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outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
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outb(probe_val, PIC_MASTER_IMR);
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outb(probe_val, PIC_MASTER_IMR);
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new_val = inb(PIC_MASTER_IMR);
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new_val = inb(PIC_MASTER_IMR);
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if (new_val != probe_val) {
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if (new_val != probe_val) {
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printk(KERN_INFO "Using NULL legacy PIC\n");
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printk(KERN_INFO "Using NULL legacy PIC\n");
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legacy_pic = &null_legacy_pic;
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legacy_pic = &null_legacy_pic;
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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return;
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}
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}
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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return nr_legacy_irqs();
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}
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static void init_8259A(int auto_eoi)
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{
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unsigned long flags;
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i8259A_auto_eoi = auto_eoi;
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
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outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
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/*
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/*
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@ -379,6 +386,10 @@ static int legacy_pic_irq_pending_noop(unsigned int irq)
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{
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{
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return 0;
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return 0;
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}
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}
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static int legacy_pic_probe(void)
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{
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return 0;
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}
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struct legacy_pic null_legacy_pic = {
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struct legacy_pic null_legacy_pic = {
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.nr_legacy_irqs = 0,
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.nr_legacy_irqs = 0,
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@ -388,6 +399,7 @@ struct legacy_pic null_legacy_pic = {
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.mask_all = legacy_pic_noop,
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.mask_all = legacy_pic_noop,
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.restore_mask = legacy_pic_noop,
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.restore_mask = legacy_pic_noop,
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.init = legacy_pic_int_noop,
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.init = legacy_pic_int_noop,
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.probe = legacy_pic_probe,
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.irq_pending = legacy_pic_irq_pending_noop,
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.irq_pending = legacy_pic_irq_pending_noop,
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.make_irq = legacy_pic_uint_noop,
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.make_irq = legacy_pic_uint_noop,
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};
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};
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@ -400,6 +412,7 @@ struct legacy_pic default_legacy_pic = {
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.mask_all = mask_8259A,
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.mask_all = mask_8259A,
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.restore_mask = unmask_8259A,
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.restore_mask = unmask_8259A,
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.init = init_8259A,
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.init = init_8259A,
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.probe = probe_8259A,
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.irq_pending = i8259A_irq_pending,
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.irq_pending = i8259A_irq_pending,
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.make_irq = make_8259A_irq,
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.make_irq = make_8259A_irq,
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};
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};
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@ -1188,7 +1188,7 @@ void __init setup_arch(char **cmdline_p)
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*/
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*/
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clone_pgd_range(initial_page_table,
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clone_pgd_range(initial_page_table,
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swapper_pg_dir + KERNEL_PGD_BOUNDARY,
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swapper_pg_dir + KERNEL_PGD_BOUNDARY,
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KERNEL_PGD_PTRS);
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min(KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
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#endif
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#endif
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tboot_probe();
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tboot_probe();
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@ -34,10 +34,11 @@
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#include <asm/msr-index.h>
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#include <asm/msr-index.h>
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verify_cpu:
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verify_cpu:
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pushfl # Save caller passed flags
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pushf # Save caller passed flags
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pushl $0 # Kill any dangerous flags
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push $0 # Kill any dangerous flags
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popfl
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popf
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#ifndef __x86_64__
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pushfl # standard way to check for cpuid
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pushfl # standard way to check for cpuid
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popl %eax
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popl %eax
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movl %eax,%ebx
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movl %eax,%ebx
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popl %eax
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popl %eax
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cmpl %eax,%ebx
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cmpl %eax,%ebx
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jz verify_cpu_no_longmode # cpu has no cpuid
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jz verify_cpu_no_longmode # cpu has no cpuid
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#endif
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movl $0x0,%eax # See if cpuid 1 is implemented
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movl $0x0,%eax # See if cpuid 1 is implemented
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cpuid
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cpuid
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jmp verify_cpu_sse_test # try again
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jmp verify_cpu_sse_test # try again
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verify_cpu_no_longmode:
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verify_cpu_no_longmode:
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popfl # Restore caller passed flags
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popf # Restore caller passed flags
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movl $1,%eax
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movl $1,%eax
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ret
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ret
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verify_cpu_sse_ok:
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verify_cpu_sse_ok:
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popfl # Restore caller passed flags
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popf # Restore caller passed flags
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xorl %eax, %eax
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xorl %eax, %eax
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ret
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ret
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@ -358,6 +358,21 @@ static void walk_pud_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
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#define pgd_none(a) pud_none(__pud(pgd_val(a)))
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#define pgd_none(a) pud_none(__pud(pgd_val(a)))
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#endif
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#endif
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#ifdef CONFIG_X86_64
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static inline bool is_hypervisor_range(int idx)
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{
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/*
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* ffff800000000000 - ffff87ffffffffff is reserved for
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* the hypervisor.
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*/
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return paravirt_enabled() &&
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(idx >= pgd_index(__PAGE_OFFSET) - 16) &&
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(idx < pgd_index(__PAGE_OFFSET));
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}
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#else
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static inline bool is_hypervisor_range(int idx) { return false; }
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#endif
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static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
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static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
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bool checkwx)
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bool checkwx)
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{
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{
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for (i = 0; i < PTRS_PER_PGD; i++) {
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for (i = 0; i < PTRS_PER_PGD; i++) {
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st.current_address = normalize_addr(i * PGD_LEVEL_MULT);
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st.current_address = normalize_addr(i * PGD_LEVEL_MULT);
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if (!pgd_none(*start)) {
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if (!pgd_none(*start) && !is_hypervisor_range(i)) {
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if (pgd_large(*start) || !pgd_present(*start)) {
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if (pgd_large(*start) || !pgd_present(*start)) {
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prot = pgd_flags(*start);
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prot = pgd_flags(*start);
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note_page(m, &st, __pgprot(prot), 1);
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note_page(m, &st, __pgprot(prot), 1);
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