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net/mlx5: Remove spinlock support from mlx5_write64 

As there is no user of mlx5_write64 that passes a spinlock to
mlx5_write64, remove this functionality and simplify the function.

Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
hifive-unleashed-5.2
Maxim Mikityanskiy 2019-03-29 15:37:52 -07:00 committed by Saeed Mahameed
parent 38702cce54
commit bbf29f618e
5 changed files with 13 additions and 26 deletions
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2
drivers/infiniband/hw/mlx5/qp.c
View File

@ -5015,7 +5015,7 @@ out:
wmb();
/* currently we support only regular doorbells */
mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL);
mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset);
/* Make sure doorbells don't leak out of SQ spinlock
* and reach the HCA out of order.
*/

2
drivers/net/ethernet/mellanox/mlx5/core/en.h
View File

@ -916,7 +916,7 @@ void mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc,
*/
wmb();
mlx5_write64((__be32 *)ctrl, uar_map, NULL);
mlx5_write64((__be32 *)ctrl, uar_map);
}
static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)

2
drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
View File

@ -135,7 +135,7 @@ static void mlx5_fpga_conn_notify_hw(struct mlx5_fpga_conn *conn, void *wqe)
*conn->qp.wq.sq.db = cpu_to_be32(conn->qp.sq.pc);
/* Make sure that doorbell record is visible before ringing */
wmb();
mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET, NULL);
mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET);
}
static void mlx5_fpga_conn_post_send(struct mlx5_fpga_conn *conn,

2
include/linux/mlx5/cq.h
View File

@ -170,7 +170,7 @@ static inline void mlx5_cq_arm(struct mlx5_core_cq *cq, u32 cmd,
doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
doorbell[1] = cpu_to_be32(cq->cqn);
mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, NULL);
mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL);
}
static inline void mlx5_cq_hold(struct mlx5_core_cq *cq)

31
include/linux/mlx5/doorbell.h
View File

@ -36,38 +36,25 @@
#define MLX5_BF_OFFSET 0x800
#define MLX5_CQ_DOORBELL 0x20
#if BITS_PER_LONG == 64
/* Assume that we can just write a 64-bit doorbell atomically. s390
* actually doesn't have writeq() but S/390 systems don't even have
* PCI so we won't worry about it.
*
* Note that the write is not atomic on 32-bit systems! In contrast to 64-bit
* ones, it requires proper locking. mlx5_write64 doesn't do any locking, so use
* it at your own discretion, protected by some kind of lock on 32 bits.
*
* TODO: use write{q,l}_relaxed()
*/
static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
spinlock_t *doorbell_lock)
static inline void mlx5_write64(__be32 val[2], void __iomem *dest)
{
#if BITS_PER_LONG == 64
__raw_writeq(*(u64 *)val, dest);
}
#else
/* Just fall back to a spinlock to protect the doorbell if
* BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit
* MMIO writes.
*/
static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
spinlock_t *doorbell_lock)
{
unsigned long flags;
if (doorbell_lock)
spin_lock_irqsave(doorbell_lock, flags);
__raw_writel((__force u32) val[0], dest);
__raw_writel((__force u32) val[1], dest + 4);
if (doorbell_lock)
spin_unlock_irqrestore(doorbell_lock, flags);
#endif
}
#endif
#endif /* MLX5_DOORBELL_H */