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clk: imx: imx8qxp-lpcg: add parsing clocks from device tree 

Add parsing clocks from device tree.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
--
Changelog:
v1->v3: no changes
5.4-rM2-2.2.x-imx-squashed
Dong Aisheng 2019-02-19 14:49:20 +08:00
parent 19d97bb532
commit bbf6c78d18
1 changed files with 90 additions and 0 deletions
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90
drivers/clk/imx/clk-imx8qxp-lpcg.c
View File

@ -9,6 +9,7 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@ -372,6 +373,88 @@ static const struct imx8qxp_ss_lpcg imx8qxp_ss_mipi1 = {
.num_max = IMX_MIPI1_LPCG_CLK_END,
};
#define IMX_LPCG_MAX_CLKS 8
static int imx_lpcg_parse_clks_from_dt(struct platform_device *pdev,
struct device_node *np)
{
const char *output_names[IMX_LPCG_MAX_CLKS];
const char *parent_names[IMX_LPCG_MAX_CLKS];
unsigned int bit_offset[IMX_LPCG_MAX_CLKS];
struct clk_hw_onecell_data *clk_data;
struct clk_hw **clk_hws;
struct resource *res;
void __iomem *base;
bool autogate;
int count;
int ret;
int i;
if (!of_device_is_compatible(np, "fsl,imx8qxp-lpcg"))
return -EINVAL;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(base))
return PTR_ERR(base);
count = of_property_count_u32_elems(np, "bit-offset");
if (count < 0) {
dev_err(&pdev->dev, "failed to count clocks\n");
return -EINVAL;
}
clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hws, count),
GFP_KERNEL);
if (!clk_data)
return -ENOMEM;
clk_data->num = count;
clk_hws = clk_data->hws;
ret = of_property_read_u32_array(np, "bit-offset", bit_offset,
clk_data->num);
if (ret < 0) {
dev_err(&pdev->dev, "failed to read clocks bit-offset\n");
return -EINVAL;
}
ret = of_clk_parent_fill(np, parent_names, clk_data->num);
if (ret != clk_data->num) {
dev_err(&pdev->dev, "failed to get clock parent names\n");
return -EINVAL;
}
ret = of_property_read_string_array(np, "clock-output-names",
output_names, clk_data->num);
if (ret != clk_data->num) {
dev_err(&pdev->dev, "failed to read clock-output-names\n");
return -EINVAL;
}
autogate = of_property_read_bool(np, "hw-autogate");
for (i = 0; i < clk_data->num; i++) {
if (bit_offset[i] > 31) {
dev_warn(&pdev->dev, "invalid bit offset of clock %d\n",
i);
return -EINVAL;
}
clk_hws[i] = imx_clk_lpcg_scu(output_names[i],
parent_names[i], 0, base,
bit_offset[i], autogate);
if (IS_ERR(clk_hws[i])) {
dev_warn(&pdev->dev, "failed to register clock %d\n",
i);
return -EINVAL;
}
}
return devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,
clk_data);
}
static int imx8qxp_lpcg_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@ -382,8 +465,14 @@ static int imx8qxp_lpcg_clk_probe(struct platform_device *pdev)
struct resource *res;
struct clk_hw **clks;
void __iomem *base;
int ret;
int i;
/* try new binding to parse clocks from device tree first */
ret = imx_lpcg_parse_clks_from_dt(pdev, np);
if (!ret)
return 0;
ss_lpcg = of_device_get_match_data(dev);
if (!ss_lpcg)
return -ENODEV;
@ -432,6 +521,7 @@ static const struct of_device_id imx8qxp_lpcg_match[] = {
{ .compatible = "fsl,imx8qxp-lpcg-dc", &imx8qxp_ss_dc, },
{ .compatible = "fsl,imx8qxp-lpcg-mipi0", &imx8qxp_ss_mipi0, },
{ .compatible = "fsl,imx8qxp-lpcg-mipi1", &imx8qxp_ss_mipi1, },
{ .compatible = "fsl,imx8qxp-lpcg", NULL },
{ /* sentinel */ }
};