staging: comedi: s626: move encoder functions part 3
Move the final lot of encoder functions to help avoid the forward declaration of `s626_enc_chan_info[]`. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
17afeac2fd
commit
bc284a2aa5
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@ -1032,6 +1032,173 @@ static uint16_t get_load_trig_b(struct comedi_device *dev,
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return (debi_read(dev, k->my_crb) >> CRBBIT_LOADSRC_B) & 3;
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}
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/*
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* Return/set counter interrupt source and clear any captured
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* index/overflow events. int_source: 0=Disabled, 1=OverflowOnly,
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* 2=IndexOnly, 3=IndexAndOverflow.
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*/
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static void set_int_src_a(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t int_source)
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{
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struct s626_private *devpriv = dev->private;
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/* Reset any pending counter overflow or index captures. */
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
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/* Program counter interrupt source. */
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debi_replace(dev, k->my_cra, ~CRAMSK_INTSRC_A,
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int_source << CRABIT_INTSRC_A);
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/* Update MISC2 interrupt enable mask. */
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devpriv->counter_int_enabs =
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(devpriv->counter_int_enabs & ~k->my_event_bits[3]) |
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k->my_event_bits[int_source];
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}
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static void set_int_src_b(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t int_source)
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{
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struct s626_private *devpriv = dev->private;
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uint16_t crb;
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/* Cache writeable CRB register image. */
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crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL;
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/* Reset any pending counter overflow or index captures. */
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debi_write(dev, k->my_crb,
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(uint16_t)(crb | CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B));
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/* Program counter interrupt source. */
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debi_write(dev, k->my_crb,
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(uint16_t)((crb & ~CRBMSK_INTSRC_B) |
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(int_source << CRBBIT_INTSRC_B)));
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/* Update MISC2 interrupt enable mask. */
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devpriv->counter_int_enabs =
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(devpriv->counter_int_enabs & ~k->my_event_bits[3]) |
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k->my_event_bits[int_source];
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}
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static uint16_t get_int_src_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (debi_read(dev, k->my_cra) >> CRABIT_INTSRC_A) & 3;
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}
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static uint16_t get_int_src_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (debi_read(dev, k->my_crb) >> CRBBIT_INTSRC_B) & 3;
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}
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#ifdef unused
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/*
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* Return/set the clock multiplier.
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*/
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static void set_clk_mult(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKMULT) |
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(value << STDBIT_CLKMULT)), FALSE);
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}
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static uint16_t get_clk_mult(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKMULT) & 3;
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}
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/*
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* Return/set the clock polarity.
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*/
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static void set_clk_pol(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKPOL) |
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(value << STDBIT_CLKPOL)), FALSE);
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}
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static uint16_t get_clk_pol(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKPOL) & 1;
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}
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/*
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* Return/set the clock source.
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*/
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static void set_clk_src(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKSRC) |
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(value << STDBIT_CLKSRC)), FALSE);
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}
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static uint16_t get_clk_src(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKSRC) & 3;
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}
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/*
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* Return/set the index polarity.
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*/
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static void set_index_pol(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXPOL) |
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((value != 0) << STDBIT_INDXPOL)), FALSE);
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}
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static uint16_t get_index_pol(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_INDXPOL) & 1;
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}
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/*
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* Return/set the index source.
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*/
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static void set_index_src(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXSRC) |
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((value != 0) << STDBIT_INDXSRC)), FALSE);
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}
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static uint16_t get_index_src(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_INDXSRC) & 1;
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}
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#endif
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/*
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* Generate an index pulse.
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*/
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static void pulse_index_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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cra = debi_read(dev, k->my_cra);
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/* Pulse index. */
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debi_write(dev, k->my_cra, (cra ^ CRAMSK_INDXPOL_A));
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debi_write(dev, k->my_cra, cra);
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}
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static void pulse_index_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t crb;
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crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL;
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/* Pulse index. */
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debi_write(dev, k->my_crb, (crb ^ CRBMSK_INDXPOL_B));
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debi_write(dev, k->my_crb, crb);
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}
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static unsigned int s626_ai_reg_to_uint(int data)
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{
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unsigned int tempdata;
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@ -2203,173 +2370,6 @@ static void close_dma_b(struct comedi_device *dev, struct buffer_dma *pdma,
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}
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}
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/*
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* Return/set counter interrupt source and clear any captured
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* index/overflow events. int_source: 0=Disabled, 1=OverflowOnly,
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* 2=IndexOnly, 3=IndexAndOverflow.
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*/
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static void set_int_src_a(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t int_source)
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{
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struct s626_private *devpriv = dev->private;
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/* Reset any pending counter overflow or index captures. */
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
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/* Program counter interrupt source. */
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debi_replace(dev, k->my_cra, ~CRAMSK_INTSRC_A,
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int_source << CRABIT_INTSRC_A);
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/* Update MISC2 interrupt enable mask. */
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devpriv->counter_int_enabs =
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(devpriv->counter_int_enabs & ~k->my_event_bits[3]) |
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k->my_event_bits[int_source];
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}
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static void set_int_src_b(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t int_source)
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{
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struct s626_private *devpriv = dev->private;
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uint16_t crb;
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/* Cache writeable CRB register image. */
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crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL;
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/* Reset any pending counter overflow or index captures. */
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debi_write(dev, k->my_crb,
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(uint16_t)(crb | CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B));
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/* Program counter interrupt source. */
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debi_write(dev, k->my_crb,
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(uint16_t)((crb & ~CRBMSK_INTSRC_B) |
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(int_source << CRBBIT_INTSRC_B)));
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/* Update MISC2 interrupt enable mask. */
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devpriv->counter_int_enabs =
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(devpriv->counter_int_enabs & ~k->my_event_bits[3]) |
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k->my_event_bits[int_source];
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}
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static uint16_t get_int_src_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (debi_read(dev, k->my_cra) >> CRABIT_INTSRC_A) & 3;
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}
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static uint16_t get_int_src_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (debi_read(dev, k->my_crb) >> CRBBIT_INTSRC_B) & 3;
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}
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#ifdef unused
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/*
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* Return/set the clock multiplier.
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*/
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static void set_clk_mult(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKMULT) |
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(value << STDBIT_CLKMULT)), FALSE);
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}
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static uint16_t get_clk_mult(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKMULT) & 3;
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}
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/*
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* Return/set the clock polarity.
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*/
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static void set_clk_pol(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKPOL) |
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(value << STDBIT_CLKPOL)), FALSE);
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}
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static uint16_t get_clk_pol(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKPOL) & 1;
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}
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/*
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* Return/set the clock source.
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*/
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static void set_clk_src(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKSRC) |
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(value << STDBIT_CLKSRC)), FALSE);
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}
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static uint16_t get_clk_src(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_CLKSRC) & 3;
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}
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/*
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* Return/set the index polarity.
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*/
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static void set_index_pol(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXPOL) |
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((value != 0) << STDBIT_INDXPOL)), FALSE);
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}
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static uint16_t get_index_pol(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_INDXPOL) & 1;
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}
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/*
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* Return/set the index source.
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*/
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static void set_index_src(struct comedi_device *dev,
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const struct s626_enc_info *k, uint16_t value)
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{
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k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXSRC) |
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((value != 0) << STDBIT_INDXSRC)), FALSE);
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}
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static uint16_t get_index_src(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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return (k->get_mode(dev, k) >> STDBIT_INDXSRC) & 1;
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}
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#endif
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/*
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* Generate an index pulse.
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*/
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static void pulse_index_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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cra = debi_read(dev, k->my_cra);
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/* Pulse index. */
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debi_write(dev, k->my_cra, (cra ^ CRAMSK_INDXPOL_A));
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debi_write(dev, k->my_cra, cra);
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}
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static void pulse_index_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t crb;
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crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL;
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/* Pulse index. */
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debi_write(dev, k->my_crb, (crb ^ CRBMSK_INDXPOL_B));
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debi_write(dev, k->my_crb, crb);
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}
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static const struct s626_enc_info s626_enc_chan_info[] = {
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{
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.get_enable = get_enable_a,
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