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serial: imx: Fix the CTS_B polarity in RS485 mode

When userspace passes the SER_RS485_RTS_ON_SEND flag it means that the
CTS_B pin should go to logic level high before the transmission begins.

CTS_B goes to logic level high when both CTSC and CTS bits are cleared.

When userspace passes the SER_RS485_RTS_AFTER_SEND flag it means that the
CTS_B pin should go to logic level low after the transmission finishes.

CTS_B goes to logic level low when CTSC bit is cleared and CTS bit is set.

So fix the CTS_B polarity logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
hifive-unleashed-5.1
Fabio Estevam 2017-01-30 09:12:12 -02:00 committed by Greg Kroah-Hartman
parent 1a613626d2
commit bc2be239fe
1 changed files with 3 additions and 3 deletions

View File

@ -336,15 +336,15 @@ static void imx_port_ucrs_restore(struct uart_port *port,
static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
{
*ucr2 &= ~UCR2_CTSC;
*ucr2 |= UCR2_CTS;
*ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
mctrl_gpio_set(sport->gpios, sport->port.mctrl | TIOCM_RTS);
}
static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
{
*ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
*ucr2 &= ~UCR2_CTSC;
*ucr2 |= UCR2_CTS;
mctrl_gpio_set(sport->gpios, sport->port.mctrl & ~TIOCM_RTS);
}