Misc: phantom, improved data passing
This new version guarantees amb_bit switch in small enough intervals, so that the device won't stop working in the middle of a movement anymore. However it preserves old (openhaptics) functionality. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>hifive-unleashed-5.1
Jiri Slaby
Linus Torvalds
parent
b2afe33170
commit
bc552f7715
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@ -25,13 +25,14 @@
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#include <asm/atomic.h>
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#include <asm/io.h>
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#define PHANTOM_VERSION "n0.9.5"
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#define PHANTOM_VERSION "n0.9.7"
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#define PHANTOM_MAX_MINORS 8
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#define PHN_IRQCTL 0x4c /* irq control in caddr space */
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#define PHB_RUNNING 1
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#define PHB_NOT_OH 2
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static struct class *phantom_class;
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static int phantom_major;
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@ -48,7 +49,11 @@ struct phantom_device {
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struct cdev cdev;
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struct mutex open_lock;
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spinlock_t ioctl_lock;
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spinlock_t regs_lock;
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/* used in NOT_OH mode */
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struct phm_regs oregs;
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u32 ctl_reg;
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};
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static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
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@ -83,6 +88,7 @@ static long phantom_ioctl(struct file *file, unsigned int cmd,
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struct phm_regs rs;
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struct phm_reg r;
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void __user *argp = (void __user *)arg;
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unsigned long flags;
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unsigned int i;
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if (_IOC_TYPE(cmd) != PH_IOC_MAGIC ||
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@ -97,32 +103,45 @@ static long phantom_ioctl(struct file *file, unsigned int cmd,
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if (r.reg > 7)
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return -EINVAL;
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spin_lock(&dev->ioctl_lock);
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spin_lock_irqsave(&dev->regs_lock, flags);
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if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
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phantom_status(dev, dev->status | PHB_RUNNING)){
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spin_unlock(&dev->ioctl_lock);
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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return -ENODEV;
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}
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pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
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/* preserve amp bit (don't allow to change it when in NOT_OH) */
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if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
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r.value &= ~PHN_CTL_AMP;
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r.value |= dev->ctl_reg & PHN_CTL_AMP;
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dev->ctl_reg = r.value;
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}
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iowrite32(r.value, dev->iaddr + r.reg);
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ioread32(dev->iaddr); /* PCI posting */
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if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
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phantom_status(dev, dev->status & ~PHB_RUNNING);
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spin_unlock(&dev->ioctl_lock);
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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break;
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case PHN_SET_REGS:
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if (copy_from_user(&rs, argp, sizeof(rs)))
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return -EFAULT;
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pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
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spin_lock(&dev->ioctl_lock);
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for (i = 0; i < min(rs.count, 8U); i++)
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if ((1 << i) & rs.mask)
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iowrite32(rs.values[i], dev->oaddr + i);
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ioread32(dev->iaddr); /* PCI posting */
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spin_unlock(&dev->ioctl_lock);
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spin_lock_irqsave(&dev->regs_lock, flags);
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if (dev->status & PHB_NOT_OH)
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memcpy(&dev->oregs, &rs, sizeof(rs));
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else {
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u32 m = min(rs.count, 8U);
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for (i = 0; i < m; i++)
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if (rs.mask & BIT(i))
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iowrite32(rs.values[i], dev->oaddr + i);
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ioread32(dev->iaddr); /* PCI posting */
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}
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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break;
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case PHN_GET_REG:
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if (copy_from_user(&r, argp, sizeof(r)))
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@ -136,20 +155,35 @@ static long phantom_ioctl(struct file *file, unsigned int cmd,
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if (copy_to_user(argp, &r, sizeof(r)))
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return -EFAULT;
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break;
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case PHN_GET_REGS:
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case PHN_GET_REGS: {
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u32 m;
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if (copy_from_user(&rs, argp, sizeof(rs)))
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return -EFAULT;
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m = min(rs.count, 8U);
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pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
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spin_lock(&dev->ioctl_lock);
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for (i = 0; i < min(rs.count, 8U); i++)
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if ((1 << i) & rs.mask)
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spin_lock_irqsave(&dev->regs_lock, flags);
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for (i = 0; i < m; i++)
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if (rs.mask & BIT(i))
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rs.values[i] = ioread32(dev->iaddr + i);
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spin_unlock(&dev->ioctl_lock);
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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if (copy_to_user(argp, &rs, sizeof(rs)))
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return -EFAULT;
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break;
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} case PHN_NOT_OH:
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spin_lock_irqsave(&dev->regs_lock, flags);
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if (dev->status & PHB_RUNNING) {
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printk(KERN_ERR "phantom: you need to set NOT_OH "
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"before you start the device!\n");
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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return -EINVAL;
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}
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dev->status |= PHB_NOT_OH;
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spin_unlock_irqrestore(&dev->regs_lock, flags);
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break;
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default:
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return -ENOTTY;
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}
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@ -172,8 +206,11 @@ static int phantom_open(struct inode *inode, struct file *file)
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return -EINVAL;
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}
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WARN_ON(dev->status & PHB_NOT_OH);
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file->private_data = dev;
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atomic_set(&dev->counter, 0);
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dev->opened++;
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mutex_unlock(&dev->open_lock);
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@ -188,6 +225,7 @@ static int phantom_release(struct inode *inode, struct file *file)
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dev->opened = 0;
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phantom_status(dev, dev->status & ~PHB_RUNNING);
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dev->status &= ~PHB_NOT_OH;
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mutex_unlock(&dev->open_lock);
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@ -221,12 +259,32 @@ static struct file_operations phantom_file_ops = {
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static irqreturn_t phantom_isr(int irq, void *data)
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{
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struct phantom_device *dev = data;
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unsigned int i;
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u32 ctl;
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if (!(ioread32(dev->iaddr + PHN_CONTROL) & PHN_CTL_IRQ))
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spin_lock(&dev->regs_lock);
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ctl = ioread32(dev->iaddr + PHN_CONTROL);
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if (!(ctl & PHN_CTL_IRQ)) {
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spin_unlock(&dev->regs_lock);
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return IRQ_NONE;
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}
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iowrite32(0, dev->iaddr);
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iowrite32(0xc0, dev->iaddr);
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if (dev->status & PHB_NOT_OH) {
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struct phm_regs *r = &dev->oregs;
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u32 m = min(r->count, 8U);
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for (i = 0; i < m; i++)
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if (r->mask & BIT(i))
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iowrite32(r->values[i], dev->oaddr + i);
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dev->ctl_reg ^= PHN_CTL_AMP;
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iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
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}
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spin_unlock(&dev->regs_lock);
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ioread32(dev->iaddr); /* PCI posting */
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atomic_inc(&dev->counter);
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@ -298,7 +356,7 @@ static int __devinit phantom_probe(struct pci_dev *pdev,
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}
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mutex_init(&pht->open_lock);
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spin_lock_init(&pht->ioctl_lock);
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spin_lock_init(&pht->regs_lock);
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init_waitqueue_head(&pht->wait);
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cdev_init(&pht->cdev, &phantom_file_ops);
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pht->cdev.owner = THIS_MODULE;
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@ -30,7 +30,11 @@ struct phm_regs {
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#define PHN_SET_REG _IOW (PH_IOC_MAGIC, 1, struct phm_reg *)
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#define PHN_GET_REGS _IOWR(PH_IOC_MAGIC, 2, struct phm_regs *)
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#define PHN_SET_REGS _IOW (PH_IOC_MAGIC, 3, struct phm_regs *)
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#define PH_IOC_MAXNR 3
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/* this ioctl tells the driver, that the caller is not OpenHaptics and might
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* use improved registers update (no more phantom switchoffs when using
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* libphantom) */
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#define PHN_NOT_OH _IO (PH_IOC_MAGIC, 4)
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#define PH_IOC_MAXNR 4
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#define PHN_CONTROL 0x6 /* control byte in iaddr space */
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#define PHN_CTL_AMP 0x1 /* switch after torques change */
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