1
0
Fork 0

Merge branch 'for-torvalds' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson

* 'for-torvalds' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  mach-ux500: configure board for the TPS61052 regulator v2
  mach-ux500: provide ab8500 init vector
  mach-ux500: board support for AB8500 GPIO driver
  gpio: driver for 42 AB8500 GPIO pins
hifive-unleashed-5.1
Linus Torvalds 2011-03-28 15:14:45 -07:00
commit bc5bbc4541
13 changed files with 873 additions and 4 deletions

View File

@ -23,6 +23,7 @@ menu "Ux500 target platform"
config MACH_U8500
bool "U8500 Development platform"
depends on UX500_SOC_DB8500
select TPS6105X
help
Include support for the mop500 development platform.

View File

@ -13,6 +13,30 @@
#include <linux/regulator/ab8500.h>
#include "board-mop500-regulators.h"
/*
* TPS61052 regulator
*/
static struct regulator_consumer_supply tps61052_vaudio_consumers[] = {
/*
* Boost converter supply to raise voltage on audio speaker, this
* is actually connected to three pins, VInVhfL (left amplifier)
* VInVhfR (right amplifier) and VIntDClassInt - all three must
* be connected to the same voltage.
*/
REGULATOR_SUPPLY("vintdclassint", "ab8500-codec.0"),
};
struct regulator_init_data tps61052_regulator = {
.constraints = {
.name = "vaudio-hf",
.min_uV = 4500000,
.max_uV = 4500000,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(tps61052_vaudio_consumers),
.consumer_supplies = tps61052_vaudio_consumers,
};
static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
/* External displays, connector on board 2v5 power supply */
REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
@ -62,6 +86,182 @@ static struct regulator_consumer_supply ab8500_vana_consumers[] = {
REGULATOR_SUPPLY("vsmps2", "mcde.0"),
};
/* ab8500 regulator register initialization */
struct ab8500_regulator_reg_init
ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
/*
* VanaRequestCtrl = HP/LP depending on VxRequest
* VextSupply1RequestCtrl = HP/LP depending on VxRequest
*/
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
/*
* VextSupply2RequestCtrl = HP/LP depending on VxRequest
* VextSupply3RequestCtrl = HP/LP depending on VxRequest
* Vaux1RequestCtrl = HP/LP depending on VxRequest
* Vaux2RequestCtrl = HP/LP depending on VxRequest
*/
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
/*
* Vaux3RequestCtrl = HP/LP depending on VxRequest
* SwHPReq = Control through SWValid disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
/*
* VanaSysClkReq1HPValid = disabled
* Vaux1SysClkReq1HPValid = disabled
* Vaux2SysClkReq1HPValid = disabled
* Vaux3SysClkReq1HPValid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
/*
* VextSupply1SysClkReq1HPValid = disabled
* VextSupply2SysClkReq1HPValid = disabled
* VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
/*
* VanaHwHPReq1Valid = disabled
* Vaux1HwHPreq1Valid = disabled
* Vaux2HwHPReq1Valid = disabled
* Vaux3HwHPReqValid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
/*
* VextSupply1HwHPReq1Valid = disabled
* VextSupply2HwHPReq1Valid = disabled
* VextSupply3HwHPReq1Valid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
/*
* VanaHwHPReq2Valid = disabled
* Vaux1HwHPReq2Valid = disabled
* Vaux2HwHPReq2Valid = disabled
* Vaux3HwHPReq2Valid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
/*
* VextSupply1HwHPReq2Valid = disabled
* VextSupply2HwHPReq2Valid = disabled
* VextSupply3HwHPReq2Valid = HWReq2 controlled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
/*
* VanaSwHPReqValid = disabled
* Vaux1SwHPReqValid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
/*
* Vaux2SwHPReqValid = disabled
* Vaux3SwHPReqValid = disabled
* VextSupply1SwHPReqValid = disabled
* VextSupply2SwHPReqValid = disabled
* VextSupply3SwHPReqValid = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
/*
* SysClkReq2Valid1 = SysClkReq2 controlled
* SysClkReq3Valid1 = disabled
* SysClkReq4Valid1 = SysClkReq4 controlled
* SysClkReq5Valid1 = disabled
* SysClkReq6Valid1 = SysClkReq6 controlled
* SysClkReq7Valid1 = disabled
* SysClkReq8Valid1 = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
/*
* SysClkReq2Valid2 = disabled
* SysClkReq3Valid2 = disabled
* SysClkReq4Valid2 = disabled
* SysClkReq5Valid2 = disabled
* SysClkReq6Valid2 = SysClkReq6 controlled
* SysClkReq7Valid2 = disabled
* SysClkReq8Valid2 = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
/*
* VTVoutEna = disabled
* Vintcore12Ena = disabled
* Vintcore12Sel = 1.25 V
* Vintcore12LP = inactive (HP)
* VTVoutLP = inactive (HP)
*/
INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
/*
* VaudioEna = disabled
* VdmicEna = disabled
* Vamic1Ena = disabled
* Vamic2Ena = disabled
*/
INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
/*
* Vamic1_dzout = high-Z when Vamic1 is disabled
* Vamic2_dzout = high-Z when Vamic2 is disabled
*/
INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
/*
* VPll = Hw controlled
* VanaRegu = force off
*/
INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
/*
* VrefDDREna = disabled
* VrefDDRSleepMode = inactive (no pulldown)
*/
INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
/*
* VextSupply1Regu = HW control
* VextSupply2Regu = HW control
* VextSupply3Regu = HW control
* ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
* ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
*/
INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
/*
* Vaux1Regu = force HP
* Vaux2Regu = force off
*/
INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
/*
* Vaux3regu = force off
*/
INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
/*
* Vsmps1 = 1.15V
*/
INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
/*
* Vaux1Sel = 2.5 V
*/
INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
/*
* Vaux2Sel = 2.9 V
*/
INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
/*
* Vaux3Sel = 2.91 V
*/
INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
/*
* VextSupply12LP = disabled (no LP)
*/
INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
/*
* Vaux1Disch = short discharge time
* Vaux2Disch = short discharge time
* Vaux3Disch = short discharge time
* Vintcore12Disch = short discharge time
* VTVoutDisch = short discharge time
* VaudioDisch = short discharge time
*/
INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
/*
* VanaDisch = short discharge time
* VdmicPullDownEna = pulldown disabled when Vdmic is disabled
* VdmicDisch = short discharge time
*/
INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
};
/* AB8500 regulators */
struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
/* supplies to the display/camera */
@ -72,6 +272,7 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
.max_uV = 2900000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS,
.boot_on = 1, /* must be on for display */
},
.num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
.consumer_supplies = ab8500_vaux1_consumers,

View File

@ -17,5 +17,6 @@
extern struct ab8500_regulator_reg_init
ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
extern struct regulator_init_data tps61052_regulator;
#endif

View File

@ -22,6 +22,8 @@
#include <linux/mfd/ab8500.h>
#include <linux/regulator/ab8500.h>
#include <linux/mfd/tc3589x.h>
#include <linux/mfd/tps6105x.h>
#include <linux/mfd/ab8500/gpio.h>
#include <linux/leds-lp5521.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
@ -42,10 +44,35 @@
#include "board-mop500.h"
#include "board-mop500-regulators.h"
static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
.gpio_base = MOP500_AB8500_GPIO(0),
.irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
/* config_reg is the initial configuration of ab8500 pins.
* The pins can be configured as GPIO or alt functions based
* on value present in GpioSel1 to GpioSel6 and AlternatFunction
* register. This is the array of 7 configuration settings.
* One has to compile time decide these settings. Below is the
* explaination of these setting
* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
* GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
* GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
* GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
* AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
* as GPIO then this register selectes the alternate fucntions
*/
.config_reg = {0x00, 0x1E, 0x80, 0x01,
0x7A, 0x00, 0x00},
};
static struct ab8500_platform_data ab8500_platdata = {
.irq_base = MOP500_AB8500_IRQ_BASE,
.regulator_reg_init = ab8500_regulator_reg_init,
.num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
.regulator = ab8500_regulators,
.num_regulator = ARRAY_SIZE(ab8500_regulators),
.gpio = &ab8500_gpio_pdata,
};
static struct resource ab8500_resources[] = {
@ -66,6 +93,15 @@ struct platform_device ab8500_device = {
.resource = ab8500_resources,
};
/*
* TPS61052
*/
static struct tps6105x_platform_data mop500_tps61052_data = {
.mode = TPS6105X_MODE_VOLTAGE,
.regulator_data = &tps61052_regulator,
};
/*
* TC35892
*/
@ -136,7 +172,7 @@ static struct lp5521_platform_data __initdata lp5521_sec_data = {
.clock_mode = LP5521_CLOCK_EXT,
};
static struct i2c_board_info mop500_i2c0_devices[] = {
static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
{
I2C_BOARD_INFO("tc3589x", 0x42),
.irq = NOMADIK_GPIO_TO_IRQ(217),
@ -144,6 +180,14 @@ static struct i2c_board_info mop500_i2c0_devices[] = {
},
};
/* I2C0 devices only available prior to HREFv60 */
static struct i2c_board_info __initdata mop500_i2c0_old_devices[] = {
{
I2C_BOARD_INFO("tps61052", 0x33),
.platform_data = &mop500_tps61052_data,
},
};
static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
{
/* lp5521 LED driver, 1st device */
@ -406,6 +450,9 @@ static void __init mop500_init_machine(void)
i2c_register_board_info(0, mop500_i2c0_devices,
ARRAY_SIZE(mop500_i2c0_devices));
if (!machine_is_hrefv60())
i2c_register_board_info(0, mop500_i2c0_old_devices,
ARRAY_SIZE(mop500_i2c0_old_devices));
i2c_register_board_info(2, mop500_i2c2_devices,
ARRAY_SIZE(mop500_i2c2_devices));
}

View File

@ -27,6 +27,10 @@
#define GPIO_BU21013_CS MOP500_EGPIO(13)
#define GPIO_SDMMC_EN MOP500_EGPIO(17)
#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18)
#define MOP500_EGPIO_END MOP500_EGPIO(24)
/* GPIOs on the AB8500 mixed-signals circuit */
#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x))
struct i2c_board_info;

View File

@ -35,9 +35,20 @@
#define MOP500_STMPE1601_IRQBASE MOP500_EGPIO_IRQ_END
#define MOP500_STMPE1601_IRQ(x) (MOP500_STMPE1601_IRQBASE + (x))
#define MOP500_NR_IRQS MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
#define MOP500_STMPE1601_IRQ_END \
MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
#define MOP500_IRQ_END MOP500_NR_IRQS
/* AB8500 virtual gpio IRQ */
#define AB8500_VIR_GPIO_NR_IRQS 16
#define MOP500_AB8500_VIR_GPIO_IRQ_BASE \
MOP500_STMPE1601_IRQ_END
#define MOP500_AB8500_VIR_GPIO_IRQ_END \
(MOP500_AB8500_VIR_GPIO_IRQ_BASE + AB8500_VIR_GPIO_NR_IRQS)
#define MOP500_NR_IRQS MOP500_AB8500_VIR_GPIO_IRQ_END
#define MOP500_IRQ_END MOP500_NR_IRQS
#if MOP500_IRQ_END > IRQ_BOARD_END
#undef IRQ_BOARD_END

View File

@ -414,4 +414,9 @@ config GPIO_JANZ_TTL
This driver provides support for driving the pins in output
mode only. Input mode is not supported.
config AB8500_GPIO
bool "ST-Ericsson AB8500 Mixed Signal Circuit gpio functions"
depends on AB8500_CORE
help
Select this to enable the AB8500 IC GPIO driver
endif

View File

@ -42,3 +42,4 @@ obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o
obj-$(CONFIG_GPIO_SX150X) += sx150x.o
obj-$(CONFIG_GPIO_VX855) += vx855_gpio.o
obj-$(CONFIG_GPIO_ML_IOH) += ml_ioh_gpio.o
obj-$(CONFIG_AB8500_GPIO) += ab8500-gpio.o

View File

@ -0,0 +1,522 @@
/*
* Copyright (C) ST-Ericsson SA 2011
*
* Author: BIBEK BASU <bibek.basu@stericsson.com>
* License terms: GNU General Public License (GPL) version 2
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mfd/ab8500.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/ab8500/gpio.h>
/*
* GPIO registers offset
* Bank: 0x10
*/
#define AB8500_GPIO_SEL1_REG 0x00
#define AB8500_GPIO_SEL2_REG 0x01
#define AB8500_GPIO_SEL3_REG 0x02
#define AB8500_GPIO_SEL4_REG 0x03
#define AB8500_GPIO_SEL5_REG 0x04
#define AB8500_GPIO_SEL6_REG 0x05
#define AB8500_GPIO_DIR1_REG 0x10
#define AB8500_GPIO_DIR2_REG 0x11
#define AB8500_GPIO_DIR3_REG 0x12
#define AB8500_GPIO_DIR4_REG 0x13
#define AB8500_GPIO_DIR5_REG 0x14
#define AB8500_GPIO_DIR6_REG 0x15
#define AB8500_GPIO_OUT1_REG 0x20
#define AB8500_GPIO_OUT2_REG 0x21
#define AB8500_GPIO_OUT3_REG 0x22
#define AB8500_GPIO_OUT4_REG 0x23
#define AB8500_GPIO_OUT5_REG 0x24
#define AB8500_GPIO_OUT6_REG 0x25
#define AB8500_GPIO_PUD1_REG 0x30
#define AB8500_GPIO_PUD2_REG 0x31
#define AB8500_GPIO_PUD3_REG 0x32
#define AB8500_GPIO_PUD4_REG 0x33
#define AB8500_GPIO_PUD5_REG 0x34
#define AB8500_GPIO_PUD6_REG 0x35
#define AB8500_GPIO_IN1_REG 0x40
#define AB8500_GPIO_IN2_REG 0x41
#define AB8500_GPIO_IN3_REG 0x42
#define AB8500_GPIO_IN4_REG 0x43
#define AB8500_GPIO_IN5_REG 0x44
#define AB8500_GPIO_IN6_REG 0x45
#define AB8500_GPIO_ALTFUN_REG 0x45
#define ALTFUN_REG_INDEX 6
#define AB8500_NUM_GPIO 42
#define AB8500_NUM_VIR_GPIO_IRQ 16
enum ab8500_gpio_action {
NONE,
STARTUP,
SHUTDOWN,
MASK,
UNMASK
};
struct ab8500_gpio {
struct gpio_chip chip;
struct ab8500 *parent;
struct device *dev;
struct mutex lock;
u32 irq_base;
enum ab8500_gpio_action irq_action;
u16 rising;
u16 falling;
};
/**
* to_ab8500_gpio() - get the pointer to ab8500_gpio
* @chip: Member of the structure ab8500_gpio
*/
static inline struct ab8500_gpio *to_ab8500_gpio(struct gpio_chip *chip)
{
return container_of(chip, struct ab8500_gpio, chip);
}
static int ab8500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
unsigned offset, int val)
{
struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
u8 pos = offset % 8;
int ret;
reg = reg + (offset / 8);
ret = abx500_mask_and_set_register_interruptible(ab8500_gpio->dev,
AB8500_MISC, reg, 1 << pos, val << pos);
if (ret < 0)
dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
return ret;
}
/**
* ab8500_gpio_get() - Get the particular GPIO value
* @chip: Gpio device
* @offset: GPIO number to read
*/
static int ab8500_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
u8 mask = 1 << (offset % 8);
u8 reg = AB8500_GPIO_OUT1_REG + (offset / 8);
int ret;
u8 data;
ret = abx500_get_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
reg, &data);
if (ret < 0) {
dev_err(ab8500_gpio->dev, "%s read failed\n", __func__);
return ret;
}
return (data & mask) >> (offset % 8);
}
static void ab8500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
{
struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
int ret;
/* Write the data */
ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, 1);
if (ret < 0)
dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
}
static int ab8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
int val)
{
int ret;
/* set direction as output */
ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
if (ret < 0)
return ret;
/* disable pull down */
ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
if (ret < 0)
return ret;
/* set the output as 1 or 0 */
return ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
}
static int ab8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
/* set the register as input */
return ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
}
static int ab8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
/*
* Only some GPIOs are interrupt capable, and they are
* organized in discontiguous clusters:
*
* GPIO6 to GPIO13
* GPIO24 and GPIO25
* GPIO36 to GPIO41
*/
static struct ab8500_gpio_irq_cluster {
int start;
int end;
} clusters[] = {
{.start = 6, .end = 13},
{.start = 24, .end = 25},
{.start = 36, .end = 41},
};
struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
int base = ab8500_gpio->irq_base;
int i;
for (i = 0; i < ARRAY_SIZE(clusters); i++) {
struct ab8500_gpio_irq_cluster *cluster = &clusters[i];
if (offset >= cluster->start && offset <= cluster->end)
return base + offset - cluster->start;
/* Advance by the number of gpios in this cluster */
base += cluster->end - cluster->start + 1;
}
return -EINVAL;
}
static struct gpio_chip ab8500gpio_chip = {
.label = "ab8500_gpio",
.owner = THIS_MODULE,
.direction_input = ab8500_gpio_direction_input,
.get = ab8500_gpio_get,
.direction_output = ab8500_gpio_direction_output,
.set = ab8500_gpio_set,
.to_irq = ab8500_gpio_to_irq,
};
static unsigned int irq_to_rising(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
int offset = irq - ab8500_gpio->irq_base;
int new_irq = offset + AB8500_INT_GPIO6R
+ ab8500_gpio->parent->irq_base;
return new_irq;
}
static unsigned int irq_to_falling(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
int offset = irq - ab8500_gpio->irq_base;
int new_irq = offset + AB8500_INT_GPIO6F
+ ab8500_gpio->parent->irq_base;
return new_irq;
}
static unsigned int rising_to_irq(unsigned int irq, void *dev)
{
struct ab8500_gpio *ab8500_gpio = dev;
int offset = irq - AB8500_INT_GPIO6R
- ab8500_gpio->parent->irq_base ;
int new_irq = offset + ab8500_gpio->irq_base;
return new_irq;
}
static unsigned int falling_to_irq(unsigned int irq, void *dev)
{
struct ab8500_gpio *ab8500_gpio = dev;
int offset = irq - AB8500_INT_GPIO6F
- ab8500_gpio->parent->irq_base ;
int new_irq = offset + ab8500_gpio->irq_base;
return new_irq;
}
/*
* IRQ handler
*/
static irqreturn_t handle_rising(int irq, void *dev)
{
handle_nested_irq(rising_to_irq(irq , dev));
return IRQ_HANDLED;
}
static irqreturn_t handle_falling(int irq, void *dev)
{
handle_nested_irq(falling_to_irq(irq, dev));
return IRQ_HANDLED;
}
static void ab8500_gpio_irq_lock(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
mutex_lock(&ab8500_gpio->lock);
}
static void ab8500_gpio_irq_sync_unlock(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
int offset = irq - ab8500_gpio->irq_base;
bool rising = ab8500_gpio->rising & BIT(offset);
bool falling = ab8500_gpio->falling & BIT(offset);
int ret;
switch (ab8500_gpio->irq_action) {
case STARTUP:
if (rising)
ret = request_threaded_irq(irq_to_rising(irq),
NULL, handle_rising,
IRQF_TRIGGER_RISING,
"ab8500-gpio-r", ab8500_gpio);
if (falling)
ret = request_threaded_irq(irq_to_falling(irq),
NULL, handle_falling,
IRQF_TRIGGER_FALLING,
"ab8500-gpio-f", ab8500_gpio);
break;
case SHUTDOWN:
if (rising)
free_irq(irq_to_rising(irq), ab8500_gpio);
if (falling)
free_irq(irq_to_falling(irq), ab8500_gpio);
break;
case MASK:
if (rising)
disable_irq(irq_to_rising(irq));
if (falling)
disable_irq(irq_to_falling(irq));
break;
case UNMASK:
if (rising)
enable_irq(irq_to_rising(irq));
if (falling)
enable_irq(irq_to_falling(irq));
break;
case NONE:
break;
}
ab8500_gpio->irq_action = NONE;
ab8500_gpio->rising &= ~(BIT(offset));
ab8500_gpio->falling &= ~(BIT(offset));
mutex_unlock(&ab8500_gpio->lock);
}
static void ab8500_gpio_irq_mask(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
ab8500_gpio->irq_action = MASK;
}
static void ab8500_gpio_irq_unmask(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
ab8500_gpio->irq_action = UNMASK;
}
static int ab8500_gpio_irq_set_type(unsigned int irq, unsigned int type)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
int offset = irq - ab8500_gpio->irq_base;
if (type == IRQ_TYPE_EDGE_BOTH) {
ab8500_gpio->rising = BIT(offset);
ab8500_gpio->falling = BIT(offset);
} else if (type == IRQ_TYPE_EDGE_RISING) {
ab8500_gpio->rising = BIT(offset);
} else {
ab8500_gpio->falling = BIT(offset);
}
return 0;
}
unsigned int ab8500_gpio_irq_startup(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
ab8500_gpio->irq_action = STARTUP;
return 0;
}
void ab8500_gpio_irq_shutdown(unsigned int irq)
{
struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
ab8500_gpio->irq_action = SHUTDOWN;
}
static struct irq_chip ab8500_gpio_irq_chip = {
.name = "ab8500-gpio",
.startup = ab8500_gpio_irq_startup,
.shutdown = ab8500_gpio_irq_shutdown,
.bus_lock = ab8500_gpio_irq_lock,
.bus_sync_unlock = ab8500_gpio_irq_sync_unlock,
.mask = ab8500_gpio_irq_mask,
.unmask = ab8500_gpio_irq_unmask,
.set_type = ab8500_gpio_irq_set_type,
};
static int ab8500_gpio_irq_init(struct ab8500_gpio *ab8500_gpio)
{
u32 base = ab8500_gpio->irq_base;
int irq;
for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ ; irq++) {
set_irq_chip_data(irq, ab8500_gpio);
set_irq_chip_and_handler(irq, &ab8500_gpio_irq_chip,
handle_simple_irq);
set_irq_nested_thread(irq, 1);
#ifdef CONFIG_ARM
set_irq_flags(irq, IRQF_VALID);
#else
set_irq_noprobe(irq);
#endif
}
return 0;
}
static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio)
{
int base = ab8500_gpio->irq_base;
int irq;
for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ; irq++) {
#ifdef CONFIG_ARM
set_irq_flags(irq, 0);
#endif
set_irq_chip_and_handler(irq, NULL, NULL);
set_irq_chip_data(irq, NULL);
}
}
static int __devinit ab8500_gpio_probe(struct platform_device *pdev)
{
struct ab8500_platform_data *ab8500_pdata =
dev_get_platdata(pdev->dev.parent);
struct ab8500_gpio_platform_data *pdata;
struct ab8500_gpio *ab8500_gpio;
int ret;
int i;
pdata = ab8500_pdata->gpio;
if (!pdata) {
dev_err(&pdev->dev, "gpio platform data missing\n");
return -ENODEV;
}
ab8500_gpio = kzalloc(sizeof(struct ab8500_gpio), GFP_KERNEL);
if (ab8500_gpio == NULL) {
dev_err(&pdev->dev, "failed to allocate memory\n");
return -ENOMEM;
}
ab8500_gpio->dev = &pdev->dev;
ab8500_gpio->parent = dev_get_drvdata(pdev->dev.parent);
ab8500_gpio->chip = ab8500gpio_chip;
ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO;
ab8500_gpio->chip.dev = &pdev->dev;
ab8500_gpio->chip.base = pdata->gpio_base;
ab8500_gpio->irq_base = pdata->irq_base;
/* initialize the lock */
mutex_init(&ab8500_gpio->lock);
/*
* AB8500 core will handle and clear the IRQ
* configre GPIO based on config-reg value.
* These values are for selecting the PINs as
* GPIO or alternate function
*/
for (i = AB8500_GPIO_SEL1_REG; i <= AB8500_GPIO_SEL6_REG; i++) {
ret = abx500_set_register_interruptible(ab8500_gpio->dev,
AB8500_MISC, i,
pdata->config_reg[i]);
if (ret < 0)
goto out_free;
}
ret = abx500_set_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
AB8500_GPIO_ALTFUN_REG,
pdata->config_reg[ALTFUN_REG_INDEX]);
if (ret < 0)
goto out_free;
ret = ab8500_gpio_irq_init(ab8500_gpio);
if (ret)
goto out_free;
ret = gpiochip_add(&ab8500_gpio->chip);
if (ret) {
dev_err(&pdev->dev, "unable to add gpiochip: %d\n",
ret);
goto out_rem_irq;
}
platform_set_drvdata(pdev, ab8500_gpio);
return 0;
out_rem_irq:
ab8500_gpio_irq_remove(ab8500_gpio);
out_free:
mutex_destroy(&ab8500_gpio->lock);
kfree(ab8500_gpio);
return ret;
}
/*
* ab8500_gpio_remove() - remove Ab8500-gpio driver
* @pdev : Platform device registered
*/
static int __devexit ab8500_gpio_remove(struct platform_device *pdev)
{
struct ab8500_gpio *ab8500_gpio = platform_get_drvdata(pdev);
int ret;
ret = gpiochip_remove(&ab8500_gpio->chip);
if (ret < 0) {
dev_err(ab8500_gpio->dev, "unable to remove gpiochip:\
%d\n", ret);
return ret;
}
platform_set_drvdata(pdev, NULL);
mutex_destroy(&ab8500_gpio->lock);
kfree(ab8500_gpio);
return 0;
}
static struct platform_driver ab8500_gpio_driver = {
.driver = {
.name = "ab8500-gpio",
.owner = THIS_MODULE,
},
.probe = ab8500_gpio_probe,
.remove = __devexit_p(ab8500_gpio_remove),
};
static int __init ab8500_gpio_init(void)
{
return platform_driver_register(&ab8500_gpio_driver);
}
arch_initcall(ab8500_gpio_init);
static void __exit ab8500_gpio_exit(void)
{
platform_driver_unregister(&ab8500_gpio_driver);
}
module_exit(ab8500_gpio_exit);
MODULE_AUTHOR("BIBEK BASU <bibek.basu@stericsson.com>");
MODULE_DESCRIPTION("Driver allows to use AB8500 unused pins\
to be used as GPIO");
MODULE_ALIAS("AB8500 GPIO driver");
MODULE_LICENSE("GPL v2");

View File

@ -362,6 +362,15 @@ static void ab8500_irq_remove(struct ab8500 *ab8500)
}
}
static struct resource ab8500_gpio_resources[] = {
{
.name = "GPIO_INT6",
.start = AB8500_INT_GPIO6R,
.end = AB8500_INT_GPIO41F,
.flags = IORESOURCE_IRQ,
}
};
static struct resource ab8500_gpadc_resources[] = {
{
.name = "HW_CONV_END",
@ -595,6 +604,11 @@ static struct mfd_cell ab8500_devs[] = {
{
.name = "ab8500-regulator",
},
{
.name = "ab8500-gpio",
.num_resources = ARRAY_SIZE(ab8500_gpio_resources),
.resources = ab8500_gpio_resources,
},
{
.name = "ab8500-gpadc",
.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),

View File

@ -97,7 +97,7 @@ static void __exit ab8500_i2c_exit(void)
{
platform_driver_unregister(&ab8500_i2c_driver);
}
subsys_initcall(ab8500_i2c_init);
arch_initcall(ab8500_i2c_init);
module_exit(ab8500_i2c_exit);
MODULE_AUTHOR("Mattias WALLIN <mattias.wallin@stericsson.com");

View File

@ -74,6 +74,45 @@
#define AB8500_INT_ACC_DETECT_21DB_F 37
#define AB8500_INT_ACC_DETECT_21DB_R 38
#define AB8500_INT_GP_SW_ADC_CONV_END 39
#define AB8500_INT_ACC_DETECT_1DB_F 33
#define AB8500_INT_ACC_DETECT_1DB_R 34
#define AB8500_INT_ACC_DETECT_22DB_F 35
#define AB8500_INT_ACC_DETECT_22DB_R 36
#define AB8500_INT_ACC_DETECT_21DB_F 37
#define AB8500_INT_ACC_DETECT_21DB_R 38
#define AB8500_INT_GP_SW_ADC_CONV_END 39
#define AB8500_INT_GPIO6R 40
#define AB8500_INT_GPIO7R 41
#define AB8500_INT_GPIO8R 42
#define AB8500_INT_GPIO9R 43
#define AB8500_INT_GPIO10R 44
#define AB8500_INT_GPIO11R 45
#define AB8500_INT_GPIO12R 46
#define AB8500_INT_GPIO13R 47
#define AB8500_INT_GPIO24R 48
#define AB8500_INT_GPIO25R 49
#define AB8500_INT_GPIO36R 50
#define AB8500_INT_GPIO37R 51
#define AB8500_INT_GPIO38R 52
#define AB8500_INT_GPIO39R 53
#define AB8500_INT_GPIO40R 54
#define AB8500_INT_GPIO41R 55
#define AB8500_INT_GPIO6F 56
#define AB8500_INT_GPIO7F 57
#define AB8500_INT_GPIO8F 58
#define AB8500_INT_GPIO9F 59
#define AB8500_INT_GPIO10F 60
#define AB8500_INT_GPIO11F 61
#define AB8500_INT_GPIO12F 62
#define AB8500_INT_GPIO13F 63
#define AB8500_INT_GPIO24F 64
#define AB8500_INT_GPIO25F 65
#define AB8500_INT_GPIO36F 66
#define AB8500_INT_GPIO37F 67
#define AB8500_INT_GPIO38F 68
#define AB8500_INT_GPIO39F 69
#define AB8500_INT_GPIO40F 70
#define AB8500_INT_GPIO41F 71
#define AB8500_INT_ADP_SOURCE_ERROR 72
#define AB8500_INT_ADP_SINK_ERROR 73
#define AB8500_INT_ADP_PROBE_PLUG 74
@ -141,6 +180,7 @@ struct ab8500 {
struct regulator_reg_init;
struct regulator_init_data;
struct ab8500_gpio_platform_data;
/**
* struct ab8500_platform_data - AB8500 platform data
@ -158,6 +198,7 @@ struct ab8500_platform_data {
struct ab8500_regulator_reg_init *regulator_reg_init;
int num_regulator;
struct regulator_init_data *regulator;
struct ab8500_gpio_platform_data *gpio;
};
extern int __devinit ab8500_init(struct ab8500 *ab8500);

View File

@ -0,0 +1,21 @@
/*
* Copyright ST-Ericsson 2010.
*
* Author: Bibek Basu <bibek.basu@stericsson.com>
* Licensed under GPLv2.
*/
#ifndef _AB8500_GPIO_H
#define _AB8500_GPIO_H
/*
* Platform data to register a block: only the initial gpio/irq number.
*/
struct ab8500_gpio_platform_data {
int gpio_base;
u32 irq_base;
u8 config_reg[7];
};
#endif /* _AB8500_GPIO_H */