pinctrl: ingenic: Add NAND FRE/FWE pins for JZ4740
Add the FRE/FWE pins for the JZ4740. These pins must be in function #0 for the NAND to work. The reason it worked before was because the bootloader did set these pins to the correct function beforehand. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20200607174243.2361664-1-paul@crapouillou.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -124,6 +124,7 @@ static int jz4740_nand_cs1_pins[] = { 0x39, };
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static int jz4740_nand_cs2_pins[] = { 0x3a, };
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static int jz4740_nand_cs3_pins[] = { 0x3b, };
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static int jz4740_nand_cs4_pins[] = { 0x3c, };
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static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
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static int jz4740_pwm_pwm0_pins[] = { 0x77, };
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static int jz4740_pwm_pwm1_pins[] = { 0x78, };
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static int jz4740_pwm_pwm2_pins[] = { 0x79, };
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@ -146,6 +147,7 @@ static int jz4740_nand_cs1_funcs[] = { 0, };
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static int jz4740_nand_cs2_funcs[] = { 0, };
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static int jz4740_nand_cs3_funcs[] = { 0, };
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static int jz4740_nand_cs4_funcs[] = { 0, };
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static int jz4740_nand_fre_fwe_funcs[] = { 0, 0, };
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static int jz4740_pwm_pwm0_funcs[] = { 0, };
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static int jz4740_pwm_pwm1_funcs[] = { 0, };
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static int jz4740_pwm_pwm2_funcs[] = { 0, };
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@ -178,6 +180,7 @@ static const struct group_desc jz4740_groups[] = {
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INGENIC_PIN_GROUP("nand-cs2", jz4740_nand_cs2),
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INGENIC_PIN_GROUP("nand-cs3", jz4740_nand_cs3),
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INGENIC_PIN_GROUP("nand-cs4", jz4740_nand_cs4),
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INGENIC_PIN_GROUP("nand-fre-fwe", jz4740_nand_fre_fwe),
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INGENIC_PIN_GROUP("pwm0", jz4740_pwm_pwm0),
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INGENIC_PIN_GROUP("pwm1", jz4740_pwm_pwm1),
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INGENIC_PIN_GROUP("pwm2", jz4740_pwm_pwm2),
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@ -195,7 +198,7 @@ static const char *jz4740_lcd_groups[] = {
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"lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-18bit-tft", "lcd-no-pins",
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};
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static const char *jz4740_nand_groups[] = {
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"nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4",
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"nand-cs1", "nand-cs2", "nand-cs3", "nand-cs4", "nand-fre-fwe",
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};
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static const char *jz4740_pwm0_groups[] = { "pwm0", };
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static const char *jz4740_pwm1_groups[] = { "pwm1", };
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