tg3: Reclaim TG3_FLG3_5761_5784_AX_FIXES flag
This patch reclaims the TG3_FLG3_5761_5784_AX_FIXES flag. It only used twice in non-fast paths. This patch also consolidates some other places where specific 5784 AX chip revisions can be generalized. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1742,7 +1742,8 @@ static int tg3_phy_reset(struct tg3 *tp)
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tw32(TG3_CPMU_CTRL, cpmuctrl);
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}
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if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) {
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
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GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX) {
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u32 val;
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val = tr32(TG3_CPMU_LSPD_1000MB_CLK);
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@ -2004,7 +2005,8 @@ static void tg3_power_down_phy(struct tg3 *tp)
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(tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
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return;
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if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) {
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
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GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX) {
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val = tr32(TG3_CPMU_LSPD_1000MB_CLK);
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val &= ~CPMU_LSPD_1000MB_MACCLK_MASK;
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val |= CPMU_LSPD_1000MB_MACCLK_12_5;
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@ -3815,8 +3817,7 @@ static int tg3_setup_phy(struct tg3 *tp, int force_reset)
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err = tg3_setup_copper_phy(tp, force_reset);
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}
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if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) {
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX) {
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u32 val, scale;
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val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK;
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@ -7044,8 +7045,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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tg3_write_sig_legacy(tp, RESET_KIND_INIT);
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if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) {
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX) {
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val = tr32(TG3_CPMU_CTRL);
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val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE);
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tw32(TG3_CPMU_CTRL, val);
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@ -12283,16 +12283,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) {
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785)
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tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
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if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5784_A1 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5761_A0 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5761_A1)
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tp->tg3_flags3 |= TG3_FLG3_5761_5784_AX_FIXES;
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}
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/* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
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* GPIO1 driven high will bring 5700's external PHY out of reset.
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* It is also used as eeprom write protect on LOMs.
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@ -2510,7 +2510,6 @@ struct tg3 {
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u32 tg3_flags3;
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#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
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#define TG3_FLG3_ENABLE_APE 0x00000002
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#define TG3_FLG3_5761_5784_AX_FIXES 0x00000004
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#define TG3_FLG3_5701_DMA_BUG 0x00000008
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#define TG3_FLG3_USE_PHYLIB 0x00000010
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#define TG3_FLG3_MDIOBUS_INITED 0x00000020
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