Staging: et131x: kill off the TXDMA CSR type
Go to a u32 and masks Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -173,31 +173,15 @@ typedef struct _GLOBAL_t { /* Location: */
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/* START OF TXDMA REGISTER ADDRESS MAP */
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/* START OF TXDMA REGISTER ADDRESS MAP */
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/*
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/*
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* structure for txdma control status reg in txdma address map
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* txdma control status reg at address 0x1000
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* located at address 0x1000
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*/
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*/
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typedef union _TXDMA_CSR_t {
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u32 value;
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#define ET_TXDMA_CSR_HALT 0x00000001
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struct {
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#define ET_TXDMA_DROP_TLP 0x00000002
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#ifdef _BIT_FIELDS_HTOL
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#define ET_TXDMA_CACHE_THRS 0x000000F0
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u32 unused2:19; /* bits 13-31 */
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#define ET_TXDMA_CACHE_SHIFT 4
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u32 traffic_class:4; /* bits 9-12 */
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#define ET_TXDMA_SNGL_EPKT 0x00000100
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u32 sngl_epkt_mode:1; /* bit 8 */
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#define ET_TXDMA_CLASS 0x00001E00
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u32 cache_thrshld:4; /* bits 4-7 */
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u32 unused1:2; /* bits 2-3 */
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u32 drop_TLP_disable:1; /* bit 1 */
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u32 halt:1; /* bit 0 */
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#else
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u32 halt:1; /* bit 0 */
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u32 drop_TLP_disable:1; /* bit 1 */
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u32 unused1:2; /* bits 2-3 */
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u32 cache_thrshld:4; /* bits 4-7 */
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u32 sngl_epkt_mode:1; /* bit 8 */
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u32 traffic_class:4; /* bits 9-12 */
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u32 unused2:19; /* bits 13-31 */
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#endif
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} bits;
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} TXDMA_CSR_t, *PTXDMA_CSR_t;
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/*
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/*
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* structure for txdma packet ring base address hi reg in txdma address map
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* structure for txdma packet ring base address hi reg in txdma address map
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@ -274,7 +258,7 @@ extern inline void add_10bit(u32 *v, int n)
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* Located at address 0x1000
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* Located at address 0x1000
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*/
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*/
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typedef struct _TXDMA_t { /* Location: */
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typedef struct _TXDMA_t { /* Location: */
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TXDMA_CSR_t csr; /* 0x1000 */
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u32 csr; /* 0x1000 */
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u32 pr_base_hi; /* 0x1004 */
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u32 pr_base_hi; /* 0x1004 */
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u32 pr_base_lo; /* 0x1008 */
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u32 pr_base_lo; /* 0x1008 */
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TXDMA_PR_NUM_DES_t pr_num_des; /* 0x100C */
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TXDMA_PR_NUM_DES_t pr_num_des; /* 0x100C */
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@ -267,7 +267,8 @@ void ConfigTxDmaRegs(struct et131x_adapter *etdev)
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void et131x_tx_dma_disable(struct et131x_adapter *etdev)
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void et131x_tx_dma_disable(struct et131x_adapter *etdev)
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{
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{
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/* Setup the tramsmit dma configuration register */
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/* Setup the tramsmit dma configuration register */
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writel(0x101, &etdev->regs->txdma.csr.value);
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writel(ET_TXDMA_CSR_HALT|ET_TXDMA_SNGL_EPKT,
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&etdev->regs->txdma.csr);
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}
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}
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/**
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/**
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@ -278,20 +279,16 @@ void et131x_tx_dma_disable(struct et131x_adapter *etdev)
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*/
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*/
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void et131x_tx_dma_enable(struct et131x_adapter *etdev)
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void et131x_tx_dma_enable(struct et131x_adapter *etdev)
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{
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{
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if (etdev->RegistryPhyLoopbk) {
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u32 csr = ET_TXDMA_SNGL_EPKT;
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if (etdev->RegistryPhyLoopbk)
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/* TxDMA is disabled for loopback operation. */
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/* TxDMA is disabled for loopback operation. */
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writel(0x101, &etdev->regs->txdma.csr.value);
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csr |= ET_TXDMA_CSR_HALT;
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} else {
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else
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TXDMA_CSR_t csr = { 0 };
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/* Setup the transmit dma configuration register for normal
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/* Setup the transmit dma configuration register for normal
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* operation
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* operation
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*/
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*/
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csr.bits.sngl_epkt_mode = 1;
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csr |= PARM_DMA_CACHE_DEF << ET_TXDMA_CACHE_SHIFT;
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csr.bits.halt = 0;
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writel(csr, &etdev->regs->txdma.csr);
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csr.bits.cache_thrshld = PARM_DMA_CACHE_DEF;
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writel(csr.value, &etdev->regs->txdma.csr.value);
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}
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}
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}
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/**
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/**
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