drm/radeon: add ucode loading support for Oland
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -38,6 +38,7 @@
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#define SI_CE_UCODE_SIZE 2144
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#define SI_CE_UCODE_SIZE 2144
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#define SI_RLC_UCODE_SIZE 2048
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#define SI_RLC_UCODE_SIZE 2048
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#define SI_MC_UCODE_SIZE 7769
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#define SI_MC_UCODE_SIZE 7769
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#define OLAND_MC_UCODE_SIZE 7863
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MODULE_FIRMWARE("radeon/TAHITI_pfp.bin");
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MODULE_FIRMWARE("radeon/TAHITI_pfp.bin");
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MODULE_FIRMWARE("radeon/TAHITI_me.bin");
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MODULE_FIRMWARE("radeon/TAHITI_me.bin");
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@ -54,6 +55,11 @@ MODULE_FIRMWARE("radeon/VERDE_me.bin");
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MODULE_FIRMWARE("radeon/VERDE_ce.bin");
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MODULE_FIRMWARE("radeon/VERDE_ce.bin");
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MODULE_FIRMWARE("radeon/VERDE_mc.bin");
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MODULE_FIRMWARE("radeon/VERDE_mc.bin");
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MODULE_FIRMWARE("radeon/VERDE_rlc.bin");
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MODULE_FIRMWARE("radeon/VERDE_rlc.bin");
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MODULE_FIRMWARE("radeon/OLAND_pfp.bin");
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MODULE_FIRMWARE("radeon/OLAND_me.bin");
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MODULE_FIRMWARE("radeon/OLAND_ce.bin");
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MODULE_FIRMWARE("radeon/OLAND_mc.bin");
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MODULE_FIRMWARE("radeon/OLAND_rlc.bin");
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extern int r600_ih_ring_alloc(struct radeon_device *rdev);
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extern int r600_ih_ring_alloc(struct radeon_device *rdev);
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extern void r600_ih_ring_fini(struct radeon_device *rdev);
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extern void r600_ih_ring_fini(struct radeon_device *rdev);
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@ -202,6 +208,45 @@ static const u32 verde_io_mc_regs[TAHITI_IO_MC_REGS_SIZE][2] = {
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{0x0000009f, 0x00a37400}
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{0x0000009f, 0x00a37400}
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};
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};
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static const u32 oland_io_mc_regs[TAHITI_IO_MC_REGS_SIZE][2] = {
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{0x0000006f, 0x03044000},
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{0x00000070, 0x0480c018},
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{0x00000071, 0x00000040},
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{0x00000072, 0x01000000},
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{0x00000074, 0x000000ff},
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{0x00000075, 0x00143400},
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{0x00000076, 0x08ec0800},
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{0x00000077, 0x040000cc},
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{0x00000079, 0x00000000},
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{0x0000007a, 0x21000409},
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{0x0000007c, 0x00000000},
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{0x0000007d, 0xe8000000},
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{0x0000007e, 0x044408a8},
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{0x0000007f, 0x00000003},
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{0x00000080, 0x00000000},
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{0x00000081, 0x01000000},
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{0x00000082, 0x02000000},
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{0x00000083, 0x00000000},
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{0x00000084, 0xe3f3e4f4},
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{0x00000085, 0x00052024},
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{0x00000087, 0x00000000},
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{0x00000088, 0x66036603},
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{0x00000089, 0x01000000},
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{0x0000008b, 0x1c0a0000},
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{0x0000008c, 0xff010000},
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{0x0000008e, 0xffffefff},
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{0x0000008f, 0xfff3efff},
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{0x00000090, 0xfff3efbf},
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{0x00000094, 0x00101101},
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{0x00000095, 0x00000fff},
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{0x00000096, 0x00116fff},
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{0x00000097, 0x60010000},
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{0x00000098, 0x10010000},
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{0x00000099, 0x00006000},
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{0x0000009a, 0x00001000},
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{0x0000009f, 0x00a17730}
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};
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/* ucode loading */
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/* ucode loading */
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static int si_mc_load_microcode(struct radeon_device *rdev)
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static int si_mc_load_microcode(struct radeon_device *rdev)
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{
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{
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@ -230,6 +275,11 @@ static int si_mc_load_microcode(struct radeon_device *rdev)
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ucode_size = SI_MC_UCODE_SIZE;
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ucode_size = SI_MC_UCODE_SIZE;
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regs_size = TAHITI_IO_MC_REGS_SIZE;
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regs_size = TAHITI_IO_MC_REGS_SIZE;
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break;
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break;
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case CHIP_OLAND:
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io_mc_regs = (u32 *)&oland_io_mc_regs;
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ucode_size = OLAND_MC_UCODE_SIZE;
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regs_size = TAHITI_IO_MC_REGS_SIZE;
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break;
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}
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}
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running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
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running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
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@ -324,6 +374,15 @@ static int si_init_microcode(struct radeon_device *rdev)
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rlc_req_size = SI_RLC_UCODE_SIZE * 4;
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rlc_req_size = SI_RLC_UCODE_SIZE * 4;
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mc_req_size = SI_MC_UCODE_SIZE * 4;
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mc_req_size = SI_MC_UCODE_SIZE * 4;
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break;
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break;
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case CHIP_OLAND:
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chip_name = "OLAND";
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rlc_chip_name = "OLAND";
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pfp_req_size = SI_PFP_UCODE_SIZE * 4;
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me_req_size = SI_PM4_UCODE_SIZE * 4;
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ce_req_size = SI_CE_UCODE_SIZE * 4;
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rlc_req_size = SI_RLC_UCODE_SIZE * 4;
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mc_req_size = OLAND_MC_UCODE_SIZE * 4;
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break;
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default: BUG();
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default: BUG();
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}
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}
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