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drm/amd/display: enable ABGR and XBGR formats (v4) 

SURFACE_PIXEL_FORMAT_GRPH_ABGR8888 is supported in amd/display/dc/dc_hw_types.h
and the necessary crossbars register controls to swap red and blue channels
are already implemented in drm/amd/display/dc/dce/dce_mem_input.c

(v4) Logic to handle new formats is added only in amdgpu_dm module.

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Mauro Rossi 2018-08-12 21:43:01 +02:00 committed by Alex Deucher
parent a19c3bea8e
commit bcd47f60ab
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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@ -1882,6 +1882,10 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
case DRM_FORMAT_ABGR2101010:
plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010;
break;
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR8888;
break;
case DRM_FORMAT_NV21:
plane_state->format = SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr;
break;
@ -3185,6 +3189,8 @@ static const uint32_t rgb_formats[] = {
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ARGB2101010,
DRM_FORMAT_ABGR2101010,
DRM_FORMAT_XBGR8888,
DRM_FORMAT_ABGR8888,
};
static const uint32_t yuv_formats[] = {