drm/amdgpu: set the gfx config properly for all CZ variants (v2)
Need to adjust the number of CUs and RBs. v2: get proper values Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1933,9 +1933,43 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
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case CHIP_CARRIZO:
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adev->gfx.config.max_shader_engines = 1;
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adev->gfx.config.max_tile_pipes = 2;
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adev->gfx.config.max_cu_per_sh = 8;
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adev->gfx.config.max_sh_per_se = 1;
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adev->gfx.config.max_backends_per_se = 2;
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switch (adev->pdev->revision) {
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case 0xc4:
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case 0x84:
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case 0xc8:
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case 0xcc:
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/* B10 */
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adev->gfx.config.max_cu_per_sh = 8;
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adev->gfx.config.max_backends_per_se = 2;
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break;
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case 0xc5:
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case 0x81:
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case 0x85:
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case 0xc9:
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case 0xcd:
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/* B8 */
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adev->gfx.config.max_cu_per_sh = 6;
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adev->gfx.config.max_backends_per_se = 2;
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break;
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case 0xc6:
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case 0xca:
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case 0xce:
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/* B6 */
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adev->gfx.config.max_cu_per_sh = 6;
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adev->gfx.config.max_backends_per_se = 2;
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break;
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case 0xc7:
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case 0x87:
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case 0xcb:
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default:
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/* B4 */
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adev->gfx.config.max_cu_per_sh = 4;
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adev->gfx.config.max_backends_per_se = 1;
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break;
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}
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adev->gfx.config.max_texture_channel_caches = 2;
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adev->gfx.config.max_gprs = 256;
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adev->gfx.config.max_gs_threads = 32;
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