This is the 5.4.84 stable release
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Andrey Zhizhikin
commit
bd87d8edca
5
Makefile
5
Makefile
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|
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 83
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SUBLEVEL = 84
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@ -802,8 +802,11 @@ DEBUG_CFLAGS += -gsplit-dwarf
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else
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DEBUG_CFLAGS += -g
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endif
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ifneq ($(LLVM_IAS),1)
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KBUILD_AFLAGS += -Wa,-gdwarf-2
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endif
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endif
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ifdef CONFIG_DEBUG_INFO_DWARF4
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DEBUG_CFLAGS += -gdwarf-4
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endif
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@ -38,15 +38,15 @@
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#ifdef CONFIG_ARC_DW2_UNWIND
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static void seed_unwind_frame_info(struct task_struct *tsk,
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struct pt_regs *regs,
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struct unwind_frame_info *frame_info)
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static int
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seed_unwind_frame_info(struct task_struct *tsk, struct pt_regs *regs,
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struct unwind_frame_info *frame_info)
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{
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/*
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* synchronous unwinding (e.g. dump_stack)
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* - uses current values of SP and friends
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*/
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if (tsk == NULL && regs == NULL) {
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if (regs == NULL && (tsk == NULL || tsk == current)) {
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unsigned long fp, sp, blink, ret;
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frame_info->task = current;
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@ -65,11 +65,15 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
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frame_info->call_frame = 0;
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} else if (regs == NULL) {
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/*
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* Asynchronous unwinding of sleeping task
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* - Gets SP etc from task's pt_regs (saved bottom of kernel
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* mode stack of task)
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* Asynchronous unwinding of a likely sleeping task
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* - first ensure it is actually sleeping
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* - if so, it will be in __switch_to, kernel mode SP of task
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* is safe-kept and BLINK at a well known location in there
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*/
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if (tsk->state == TASK_RUNNING)
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return -1;
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frame_info->task = tsk;
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frame_info->regs.r27 = TSK_K_FP(tsk);
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@ -103,6 +107,8 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
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frame_info->regs.r63 = regs->ret;
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frame_info->call_frame = 0;
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}
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return 0;
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}
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#endif
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@ -116,7 +122,8 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
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unsigned int address;
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struct unwind_frame_info frame_info;
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seed_unwind_frame_info(tsk, regs, &frame_info);
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if (seed_unwind_frame_info(tsk, regs, &frame_info))
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return 0;
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while (1) {
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address = UNW_PC(&frame_info);
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@ -5,20 +5,20 @@
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usb {
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compatible = "simple-bus";
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dma-ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x68500000 0x00400000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0x68500000 0x0 0x00400000>;
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usbphy0: usb-phy@0 {
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compatible = "brcm,sr-usb-combo-phy";
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reg = <0x00000000 0x100>;
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reg = <0x0 0x00000000 0x0 0x100>;
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#phy-cells = <1>;
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status = "disabled";
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};
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xhci0: usb@1000 {
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compatible = "generic-xhci";
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reg = <0x00001000 0x1000>;
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reg = <0x0 0x00001000 0x0 0x1000>;
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbphy0 1>, <&usbphy0 0>;
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phy-names = "phy0", "phy1";
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@ -28,7 +28,7 @@
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bdc0: usb@2000 {
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compatible = "brcm,bdc-v0.16";
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reg = <0x00002000 0x1000>;
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reg = <0x0 0x00002000 0x0 0x1000>;
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interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbphy0 0>, <&usbphy0 1>;
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phy-names = "phy0", "phy1";
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@ -38,21 +38,21 @@
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usbphy1: usb-phy@10000 {
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compatible = "brcm,sr-usb-combo-phy";
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reg = <0x00010000 0x100>;
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reg = <0x0 0x00010000 0x0 0x100>;
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#phy-cells = <1>;
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status = "disabled";
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};
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usbphy2: usb-phy@20000 {
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compatible = "brcm,sr-usb-hs-phy";
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reg = <0x00020000 0x100>;
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reg = <0x0 0x00020000 0x0 0x100>;
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#phy-cells = <0>;
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status = "disabled";
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};
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xhci1: usb@11000 {
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compatible = "generic-xhci";
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reg = <0x00011000 0x1000>;
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reg = <0x0 0x00011000 0x0 0x1000>;
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interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbphy1 1>, <&usbphy2>, <&usbphy1 0>;
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phy-names = "phy0", "phy1", "phy2";
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@ -62,7 +62,7 @@
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bdc1: usb@21000 {
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compatible = "brcm,bdc-v0.16";
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reg = <0x00021000 0x1000>;
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reg = <0x0 0x00021000 0x0 0x1000>;
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usbphy2>;
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phy-names = "phy0";
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@ -10,18 +10,6 @@
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model = "NVIDIA Jetson TX2 Developer Kit";
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compatible = "nvidia,p2771-0000", "nvidia,tegra186";
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aconnect {
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status = "okay";
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dma-controller@2930000 {
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status = "okay";
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};
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interrupt-controller@2a40000 {
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status = "okay";
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};
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};
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i2c@3160000 {
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power-monitor@42 {
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compatible = "ti,ina3221";
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@ -29,6 +29,9 @@
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i2c6 = &i2c6;
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i2c7 = &i2c7;
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i2c8 = &i2c8;
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mmc0 = &sdio0;
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mmc1 = &sdmmc;
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mmc2 = &sdhci;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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@ -250,7 +250,6 @@ KBUILD_CFLAGS += $(call cc-option,-mno-string)
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cpu-as-$(CONFIG_4xx) += -Wa,-m405
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cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
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cpu-as-$(CONFIG_E200) += -Wa,-me200
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cpu-as-$(CONFIG_E500) += -Wa,-me500
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# When using '-many -mpower4' gas will first try and find a matching power4
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@ -147,6 +147,7 @@ enum page_cache_mode {
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#endif
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#define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
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#define _PAGE_LARGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE)
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#define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
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#define _PAGE_CACHE_WP (cachemode2protval(_PAGE_CACHE_MODE_WP))
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@ -16,12 +16,13 @@ static inline void sync_core_before_usermode(void)
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/* With PTI, we unconditionally serialize before running user code. */
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if (static_cpu_has(X86_FEATURE_PTI))
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return;
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/*
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* Return from interrupt and NMI is done through iret, which is core
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* serializing.
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* Even if we're in an interrupt, we might reschedule before returning,
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* in which case we could switch to a different thread in the same mm
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* and return using SYSRET or SYSEXIT. Instead of trying to keep
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* track of our need to sync the core, just sync right away.
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*/
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if (in_irq() || in_nmi())
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return;
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sync_core();
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}
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@ -272,20 +272,24 @@ static int assign_irq_vector_any_locked(struct irq_data *irqd)
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const struct cpumask *affmsk = irq_data_get_affinity_mask(irqd);
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int node = irq_data_get_node(irqd);
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if (node == NUMA_NO_NODE)
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goto all;
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/* Try the intersection of @affmsk and node mask */
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cpumask_and(vector_searchmask, cpumask_of_node(node), affmsk);
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if (!assign_vector_locked(irqd, vector_searchmask))
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return 0;
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/* Try the node mask */
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if (!assign_vector_locked(irqd, cpumask_of_node(node)))
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return 0;
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all:
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if (node != NUMA_NO_NODE) {
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/* Try the intersection of @affmsk and node mask */
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cpumask_and(vector_searchmask, cpumask_of_node(node), affmsk);
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if (!assign_vector_locked(irqd, vector_searchmask))
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return 0;
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}
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/* Try the full affinity mask */
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cpumask_and(vector_searchmask, affmsk, cpu_online_mask);
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if (!assign_vector_locked(irqd, vector_searchmask))
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return 0;
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if (node != NUMA_NO_NODE) {
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/* Try the node mask */
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if (!assign_vector_locked(irqd, cpumask_of_node(node)))
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return 0;
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}
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/* Try the full online mask */
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return assign_vector_locked(irqd, cpu_online_mask);
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}
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@ -15,8 +15,6 @@
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* to a jmp to memcpy_erms which does the REP; MOVSB mem copy.
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*/
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.weak memcpy
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/*
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* memcpy - Copy a memory block.
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*
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@ -29,7 +27,7 @@
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* rax original destination
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*/
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ENTRY(__memcpy)
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ENTRY(memcpy)
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SYM_FUNC_START_WEAK(memcpy)
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ALTERNATIVE_2 "jmp memcpy_orig", "", X86_FEATURE_REP_GOOD, \
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"jmp memcpy_erms", X86_FEATURE_ERMS
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@ -24,9 +24,7 @@
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* Output:
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* rax: dest
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*/
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.weak memmove
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ENTRY(memmove)
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SYM_FUNC_START_WEAK(memmove)
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ENTRY(__memmove)
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/* Handle more 32 bytes in loop */
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@ -6,8 +6,6 @@
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#include <asm/alternative-asm.h>
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#include <asm/export.h>
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.weak memset
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/*
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* ISO C memset - set a memory block to a byte value. This function uses fast
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* string to get better performance than the original function. The code is
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@ -19,7 +17,7 @@
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*
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* rax original destination
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*/
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ENTRY(memset)
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SYM_FUNC_START_WEAK(memset)
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ENTRY(__memset)
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/*
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* Some CPUs support enhanced REP MOVSB/STOSB feature. It is recommended
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|
|
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|
@ -45,8 +45,8 @@
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#define PMD_FLAGS_LARGE (__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL)
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#define PMD_FLAGS_DEC PMD_FLAGS_LARGE
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#define PMD_FLAGS_DEC_WP ((PMD_FLAGS_DEC & ~_PAGE_CACHE_MASK) | \
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(_PAGE_PAT | _PAGE_PWT))
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#define PMD_FLAGS_DEC_WP ((PMD_FLAGS_DEC & ~_PAGE_LARGE_CACHE_MASK) | \
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(_PAGE_PAT_LARGE | _PAGE_PWT))
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#define PMD_FLAGS_ENC (PMD_FLAGS_LARGE | _PAGE_ENC)
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|
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|
|
|
|||
|
|
@ -327,8 +327,14 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
|
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/*
|
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* The membarrier system call requires a full memory barrier and
|
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* core serialization before returning to user-space, after
|
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* storing to rq->curr. Writing to CR3 provides that full
|
||||
* memory barrier and core serializing instruction.
|
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* storing to rq->curr, when changing mm. This is because
|
||||
* membarrier() sends IPIs to all CPUs that are in the target mm
|
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* to make them issue memory barriers. However, if another CPU
|
||||
* switches to/from the target mm concurrently with
|
||||
* membarrier(), it can cause that CPU not to receive an IPI
|
||||
* when it really should issue a memory barrier. Writing to CR3
|
||||
* provides that full memory barrier and core serializing
|
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* instruction.
|
||||
*/
|
||||
if (real_prev == next) {
|
||||
VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) !=
|
||||
|
|
|
|||
|
|
@ -567,7 +567,7 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
|
|||
return 0;
|
||||
}
|
||||
/* Also take into account max slice width */
|
||||
min_slice_count = min_t(u8, min_slice_count,
|
||||
min_slice_count = max_t(u8, min_slice_count,
|
||||
DIV_ROUND_UP(mode_hdisplay,
|
||||
max_slice_width));
|
||||
|
||||
|
|
|
|||
|
|
@ -568,12 +568,15 @@ static int cm109_input_open(struct input_dev *idev)
|
|||
dev->ctl_data->byte[HID_OR2] = dev->keybit;
|
||||
dev->ctl_data->byte[HID_OR3] = 0x00;
|
||||
|
||||
dev->ctl_urb_pending = 1;
|
||||
error = usb_submit_urb(dev->urb_ctl, GFP_KERNEL);
|
||||
if (error)
|
||||
if (error) {
|
||||
dev->ctl_urb_pending = 0;
|
||||
dev_err(&dev->intf->dev, "%s: usb_submit_urb (urb_ctl) failed %d\n",
|
||||
__func__, error);
|
||||
else
|
||||
} else {
|
||||
dev->open = 1;
|
||||
}
|
||||
|
||||
mutex_unlock(&dev->pm_mutex);
|
||||
|
||||
|
|
|
|||
|
|
@ -611,6 +611,48 @@ static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "AOA150"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire A114-31"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire A314-31"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire A315-31"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire ES1-132"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire ES1-332"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire ES1-432"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate Spin B118-RN"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* Advent 4211 */
|
||||
.matches = {
|
||||
|
|
|
|||
|
|
@ -157,8 +157,8 @@ struct qcom_icc_desc {
|
|||
}
|
||||
|
||||
DEFINE_QNODE(mas_apps_proc, QCS404_MASTER_AMPSS_M0, 8, 0, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_oxili, QCS404_MASTER_GRAPHICS_3D, 8, 6, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_mdp, QCS404_MASTER_MDP_PORT0, 8, 8, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_oxili, QCS404_MASTER_GRAPHICS_3D, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_mdp, QCS404_MASTER_MDP_PORT0, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_snoc_bimc_1, QCS404_SNOC_BIMC_1_MAS, 8, 76, -1, QCS404_SLAVE_EBI_CH0);
|
||||
DEFINE_QNODE(mas_tcu_0, QCS404_MASTER_TCU_0, 8, -1, -1, QCS404_SLAVE_EBI_CH0, QCS404_BIMC_SNOC_SLV);
|
||||
DEFINE_QNODE(mas_spdm, QCS404_MASTER_SPDM, 4, -1, -1, QCS404_PNOC_INT_3);
|
||||
|
|
|
|||
|
|
@ -40,7 +40,6 @@
|
|||
#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0)
|
||||
#define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1)
|
||||
#define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2)
|
||||
#define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3)
|
||||
|
||||
#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
|
||||
#define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1)
|
||||
|
|
@ -3367,9 +3366,6 @@ static int its_save_disable(void)
|
|||
list_for_each_entry(its, &its_nodes, entry) {
|
||||
void __iomem *base;
|
||||
|
||||
if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE))
|
||||
continue;
|
||||
|
||||
base = its->base;
|
||||
its->ctlr_save = readl_relaxed(base + GITS_CTLR);
|
||||
err = its_force_quiescent(base);
|
||||
|
|
@ -3388,9 +3384,6 @@ err:
|
|||
list_for_each_entry_continue_reverse(its, &its_nodes, entry) {
|
||||
void __iomem *base;
|
||||
|
||||
if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE))
|
||||
continue;
|
||||
|
||||
base = its->base;
|
||||
writel_relaxed(its->ctlr_save, base + GITS_CTLR);
|
||||
}
|
||||
|
|
@ -3410,9 +3403,6 @@ static void its_restore_enable(void)
|
|||
void __iomem *base;
|
||||
int i;
|
||||
|
||||
if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE))
|
||||
continue;
|
||||
|
||||
base = its->base;
|
||||
|
||||
/*
|
||||
|
|
@ -3420,7 +3410,10 @@ static void its_restore_enable(void)
|
|||
* don't restore it since writing to CBASER or BASER<n>
|
||||
* registers is undefined according to the GIC v3 ITS
|
||||
* Specification.
|
||||
*
|
||||
* Firmware resuming with the ITS enabled is terminally broken.
|
||||
*/
|
||||
WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE);
|
||||
ret = its_force_quiescent(base);
|
||||
if (ret) {
|
||||
pr_err("ITS@%pa: failed to quiesce on resume: %d\n",
|
||||
|
|
@ -3687,9 +3680,6 @@ static int __init its_probe_one(struct resource *res,
|
|||
ctlr |= GITS_CTLR_ImDe;
|
||||
writel_relaxed(ctlr, its->base + GITS_CTLR);
|
||||
|
||||
if (GITS_TYPER_HCC(typer))
|
||||
its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE;
|
||||
|
||||
err = its_init_domain(handle, its);
|
||||
if (err)
|
||||
goto out_free_tables;
|
||||
|
|
|
|||
|
|
@ -630,7 +630,7 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md,
|
|||
|
||||
memcpy(&(idata->ic.response), cmd.resp, sizeof(cmd.resp));
|
||||
|
||||
if (idata->rpmb || (cmd.flags & MMC_RSP_R1B)) {
|
||||
if (idata->rpmb || (cmd.flags & MMC_RSP_R1B) == MMC_RSP_R1B) {
|
||||
/*
|
||||
* Ensure RPMB/R1B command has completed by polling CMD13
|
||||
* "Send Status".
|
||||
|
|
|
|||
|
|
@ -1337,6 +1337,8 @@ static int m_can_dev_setup(struct m_can_classdev *m_can_dev)
|
|||
&m_can_data_bittiming_const_31X;
|
||||
break;
|
||||
case 32:
|
||||
case 33:
|
||||
/* Support both MCAN version v3.2.x and v3.3.0 */
|
||||
m_can_dev->can.bittiming_const = m_can_dev->bit_timing ?
|
||||
m_can_dev->bit_timing : &m_can_bittiming_const_31X;
|
||||
|
||||
|
|
|
|||
|
|
@ -2266,6 +2266,12 @@ static void ibmvnic_tx_timeout(struct net_device *dev)
|
|||
{
|
||||
struct ibmvnic_adapter *adapter = netdev_priv(dev);
|
||||
|
||||
if (test_bit(0, &adapter->resetting)) {
|
||||
netdev_err(adapter->netdev,
|
||||
"Adapter is resetting, skip timeout reset\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ibmvnic_reset(adapter, VNIC_RESET_TIMEOUT);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -147,6 +147,16 @@
|
|||
#define CSR_MAC_SHADOW_REG_CTL2 (CSR_BASE + 0x0AC)
|
||||
#define CSR_MAC_SHADOW_REG_CTL2_RX_WAKE 0xFFFF
|
||||
|
||||
/* LTR control (since IWL_DEVICE_FAMILY_22000) */
|
||||
#define CSR_LTR_LONG_VAL_AD (CSR_BASE + 0x0D4)
|
||||
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ 0x80000000
|
||||
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE 0x1c000000
|
||||
#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL 0x03ff0000
|
||||
#define CSR_LTR_LONG_VAL_AD_SNOOP_REQ 0x00008000
|
||||
#define CSR_LTR_LONG_VAL_AD_SNOOP_SCALE 0x00001c00
|
||||
#define CSR_LTR_LONG_VAL_AD_SNOOP_VAL 0x000003ff
|
||||
#define CSR_LTR_LONG_VAL_AD_SCALE_USEC 2
|
||||
|
||||
/* GIO Chicken Bits (PCI Express bus link power management) */
|
||||
#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
|
||||
|
||||
|
|
|
|||
|
|
@ -3022,7 +3022,7 @@ static int iwl_mvm_mac_sta_state(struct ieee80211_hw *hw,
|
|||
|
||||
/* this would be a mac80211 bug ... but don't crash */
|
||||
if (WARN_ON_ONCE(!mvmvif->phy_ctxt))
|
||||
return -EINVAL;
|
||||
return test_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status) ? 0 : -EINVAL;
|
||||
|
||||
/*
|
||||
* If we are in a STA removal flow and in DQA mode:
|
||||
|
|
|
|||
|
|
@ -180,6 +180,26 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans,
|
|||
|
||||
iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL,
|
||||
CSR_AUTO_FUNC_BOOT_ENA);
|
||||
|
||||
if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
|
||||
/*
|
||||
* The firmware initializes this again later (to a smaller
|
||||
* value), but for the boot process initialize the LTR to
|
||||
* ~250 usec.
|
||||
*/
|
||||
u32 val = CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ |
|
||||
u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
|
||||
CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE) |
|
||||
u32_encode_bits(250,
|
||||
CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL) |
|
||||
CSR_LTR_LONG_VAL_AD_SNOOP_REQ |
|
||||
u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
|
||||
CSR_LTR_LONG_VAL_AD_SNOOP_SCALE) |
|
||||
u32_encode_bits(250, CSR_LTR_LONG_VAL_AD_SNOOP_VAL);
|
||||
|
||||
iwl_write32(trans, CSR_LTR_LONG_VAL_AD, val);
|
||||
}
|
||||
|
||||
if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
|
||||
iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
|
||||
else
|
||||
|
|
|
|||
|
|
@ -2178,18 +2178,36 @@ static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
|
|||
void *buf, int dwords)
|
||||
{
|
||||
unsigned long flags;
|
||||
int offs, ret = 0;
|
||||
int offs = 0;
|
||||
u32 *vals = buf;
|
||||
|
||||
if (iwl_trans_grab_nic_access(trans, &flags)) {
|
||||
iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
|
||||
for (offs = 0; offs < dwords; offs++)
|
||||
vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
|
||||
iwl_trans_release_nic_access(trans, &flags);
|
||||
} else {
|
||||
ret = -EBUSY;
|
||||
while (offs < dwords) {
|
||||
/* limit the time we spin here under lock to 1/2s */
|
||||
ktime_t timeout = ktime_add_us(ktime_get(), 500 * USEC_PER_MSEC);
|
||||
|
||||
if (iwl_trans_grab_nic_access(trans, &flags)) {
|
||||
iwl_write32(trans, HBUS_TARG_MEM_RADDR,
|
||||
addr + 4 * offs);
|
||||
|
||||
while (offs < dwords) {
|
||||
vals[offs] = iwl_read32(trans,
|
||||
HBUS_TARG_MEM_RDAT);
|
||||
offs++;
|
||||
|
||||
/* calling ktime_get is expensive so
|
||||
* do it once in 128 reads
|
||||
*/
|
||||
if (offs % 128 == 0 && ktime_after(ktime_get(),
|
||||
timeout))
|
||||
break;
|
||||
}
|
||||
iwl_trans_release_nic_access(trans, &flags);
|
||||
} else {
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,
|
||||
|
|
|
|||
|
|
@ -435,7 +435,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
pin_reg &= ~BIT(LEVEL_TRIG_OFF);
|
||||
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
|
||||
pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
|
||||
pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
|
||||
irq_set_handler_locked(d, handle_edge_irq);
|
||||
break;
|
||||
|
||||
|
|
@ -443,7 +442,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
pin_reg &= ~BIT(LEVEL_TRIG_OFF);
|
||||
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
|
||||
pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
|
||||
pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
|
||||
irq_set_handler_locked(d, handle_edge_irq);
|
||||
break;
|
||||
|
||||
|
|
@ -451,7 +449,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
pin_reg &= ~BIT(LEVEL_TRIG_OFF);
|
||||
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
|
||||
pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
|
||||
pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
|
||||
irq_set_handler_locked(d, handle_edge_irq);
|
||||
break;
|
||||
|
||||
|
|
@ -459,8 +456,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
|
||||
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
|
||||
pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
|
||||
pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
|
||||
pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
|
||||
irq_set_handler_locked(d, handle_level_irq);
|
||||
break;
|
||||
|
||||
|
|
@ -468,8 +463,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
|
||||
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
|
||||
pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
|
||||
pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
|
||||
pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
|
||||
irq_set_handler_locked(d, handle_level_irq);
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -111,6 +111,7 @@ static const struct key_entry acer_wmi_keymap[] __initconst = {
|
|||
{KE_KEY, 0x64, {KEY_SWITCHVIDEOMODE} }, /* Display Switch */
|
||||
{KE_IGNORE, 0x81, {KEY_SLEEP} },
|
||||
{KE_KEY, 0x82, {KEY_TOUCHPAD_TOGGLE} }, /* Touch Pad Toggle */
|
||||
{KE_IGNORE, 0x84, {KEY_KBDILLUMTOGGLE} }, /* Automatic Keyboard background light toggle */
|
||||
{KE_KEY, KEY_TOUCHPAD_ON, {KEY_TOUCHPAD_ON} },
|
||||
{KE_KEY, KEY_TOUCHPAD_OFF, {KEY_TOUCHPAD_OFF} },
|
||||
{KE_IGNORE, 0x83, {KEY_TOUCHPAD_TOGGLE} },
|
||||
|
|
|
|||
|
|
@ -197,6 +197,12 @@ static const struct dmi_system_id dmi_switches_allow_list[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "HP Stream x360 Convertible PC 11"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion 13 x360 PC"),
|
||||
},
|
||||
},
|
||||
{} /* Array terminator */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3232,7 +3232,14 @@ static int hotkey_init_tablet_mode(void)
|
|||
|
||||
in_tablet_mode = hotkey_gmms_get_tablet_mode(res,
|
||||
&has_tablet_mode);
|
||||
if (has_tablet_mode)
|
||||
/*
|
||||
* The Yoga 11e series has 2 accelerometers described by a
|
||||
* BOSC0200 ACPI node. This setup relies on a Windows service
|
||||
* which calls special ACPI methods on this node to report
|
||||
* the laptop/tent/tablet mode to the EC. The bmc150 iio driver
|
||||
* does not support this, so skip the hotkey on these models.
|
||||
*/
|
||||
if (has_tablet_mode && !acpi_dev_present("BOSC0200", "1", -1))
|
||||
tp_features.hotkey_tablet = TP_HOTKEY_TABLET_USES_GMMS;
|
||||
type = "GMMS";
|
||||
} else if (acpi_evalf(hkey_handle, &res, "MHKG", "qd")) {
|
||||
|
|
@ -9690,6 +9697,7 @@ static const struct tpacpi_quirk battery_quirk_table[] __initconst = {
|
|||
TPACPI_Q_LNV3('R', '0', 'B', true), /* Thinkpad 11e gen 3 */
|
||||
TPACPI_Q_LNV3('R', '0', 'C', true), /* Thinkpad 13 */
|
||||
TPACPI_Q_LNV3('R', '0', 'J', true), /* Thinkpad 13 gen 2 */
|
||||
TPACPI_Q_LNV3('R', '0', 'K', true), /* Thinkpad 11e gen 4 celeron BIOS */
|
||||
};
|
||||
|
||||
static int __init tpacpi_battery_init(struct ibm_init_struct *ibm)
|
||||
|
|
|
|||
|
|
@ -264,6 +264,21 @@ static const struct ts_dmi_data irbis_tw90_data = {
|
|||
.properties = irbis_tw90_props,
|
||||
};
|
||||
|
||||
static const struct property_entry irbis_tw118_props[] = {
|
||||
PROPERTY_ENTRY_U32("touchscreen-min-x", 20),
|
||||
PROPERTY_ENTRY_U32("touchscreen-min-y", 30),
|
||||
PROPERTY_ENTRY_U32("touchscreen-size-x", 1960),
|
||||
PROPERTY_ENTRY_U32("touchscreen-size-y", 1510),
|
||||
PROPERTY_ENTRY_STRING("firmware-name", "gsl1680-irbis-tw118.fw"),
|
||||
PROPERTY_ENTRY_U32("silead,max-fingers", 10),
|
||||
{ }
|
||||
};
|
||||
|
||||
static const struct ts_dmi_data irbis_tw118_data = {
|
||||
.acpi_name = "MSSL1680:00",
|
||||
.properties = irbis_tw118_props,
|
||||
};
|
||||
|
||||
static const struct property_entry itworks_tw891_props[] = {
|
||||
PROPERTY_ENTRY_U32("touchscreen-min-x", 1),
|
||||
PROPERTY_ENTRY_U32("touchscreen-min-y", 5),
|
||||
|
|
@ -758,6 +773,14 @@ static const struct dmi_system_id touchscreen_dmi_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "TW90"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* Irbis TW118 */
|
||||
.driver_data = (void *)&irbis_tw118_data,
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "IRBIS"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "TW118"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* I.T.Works TW891 */
|
||||
.driver_data = (void *)&itworks_tw891_data,
|
||||
|
|
|
|||
|
|
@ -3020,7 +3020,6 @@ static int beiscsi_create_eqs(struct beiscsi_hba *phba,
|
|||
goto create_eq_error;
|
||||
}
|
||||
|
||||
mem->dma = paddr;
|
||||
mem->va = eq_vaddress;
|
||||
ret = be_fill_queue(eq, phba->params.num_eq_entries,
|
||||
sizeof(struct be_eq_entry), eq_vaddress);
|
||||
|
|
@ -3030,6 +3029,7 @@ static int beiscsi_create_eqs(struct beiscsi_hba *phba,
|
|||
goto create_eq_error;
|
||||
}
|
||||
|
||||
mem->dma = paddr;
|
||||
ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
|
||||
BEISCSI_EQ_DELAY_DEF);
|
||||
if (ret) {
|
||||
|
|
@ -3086,7 +3086,6 @@ static int beiscsi_create_cqs(struct beiscsi_hba *phba,
|
|||
goto create_cq_error;
|
||||
}
|
||||
|
||||
mem->dma = paddr;
|
||||
ret = be_fill_queue(cq, phba->params.num_cq_entries,
|
||||
sizeof(struct sol_cqe), cq_vaddress);
|
||||
if (ret) {
|
||||
|
|
@ -3096,6 +3095,7 @@ static int beiscsi_create_cqs(struct beiscsi_hba *phba,
|
|||
goto create_cq_error;
|
||||
}
|
||||
|
||||
mem->dma = paddr;
|
||||
ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
|
||||
false, 0);
|
||||
if (ret) {
|
||||
|
|
|
|||
|
|
@ -1257,8 +1257,15 @@ static int ufshcd_devfreq_target(struct device *dev,
|
|||
}
|
||||
spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
|
||||
|
||||
pm_runtime_get_noresume(hba->dev);
|
||||
if (!pm_runtime_active(hba->dev)) {
|
||||
pm_runtime_put_noidle(hba->dev);
|
||||
ret = -EAGAIN;
|
||||
goto out;
|
||||
}
|
||||
start = ktime_get();
|
||||
ret = ufshcd_devfreq_scale(hba, scale_up);
|
||||
pm_runtime_put(hba->dev);
|
||||
|
||||
trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
|
||||
(scale_up ? "up" : "down"),
|
||||
|
|
|
|||
|
|
@ -100,7 +100,6 @@ static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
|
|||
{
|
||||
int error;
|
||||
struct fsl_mc_device_irq *irq;
|
||||
cpumask_t mask;
|
||||
|
||||
irq = dpio_dev->irqs[0];
|
||||
error = devm_request_irq(&dpio_dev->dev,
|
||||
|
|
@ -117,9 +116,7 @@ static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
|
|||
}
|
||||
|
||||
/* set the affinity hint */
|
||||
cpumask_clear(&mask);
|
||||
cpumask_set_cpu(cpu, &mask);
|
||||
if (irq_set_affinity_hint(irq->msi_desc->irq, &mask))
|
||||
if (irq_set_affinity_hint(irq->msi_desc->irq, cpumask_of(cpu)))
|
||||
dev_err(&dpio_dev->dev,
|
||||
"irq_set_affinity failed irq %d cpu %d\n",
|
||||
irq->msi_desc->irq, cpu);
|
||||
|
|
|
|||
|
|
@ -1009,6 +1009,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
|
|||
struct resource *res;
|
||||
struct nxp_fspi *f;
|
||||
int ret;
|
||||
u32 reg;
|
||||
|
||||
ctlr = spi_alloc_master(&pdev->dev, sizeof(*f));
|
||||
if (!ctlr)
|
||||
|
|
@ -1035,6 +1036,12 @@ static int nxp_fspi_probe(struct platform_device *pdev)
|
|||
goto err_put_ctrl;
|
||||
}
|
||||
|
||||
/* Clear potential interrupts */
|
||||
reg = fspi_readl(f, f->iobase + FSPI_INTR);
|
||||
if (reg)
|
||||
fspi_writel(f, reg, f->iobase + FSPI_INTR);
|
||||
|
||||
|
||||
/* find the resources - controller memory mapped space */
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fspi_mmap");
|
||||
if (IS_ERR(res)) {
|
||||
|
|
|
|||
|
|
@ -1567,11 +1567,15 @@ static ssize_t pagemap_read(struct file *file, char __user *buf,
|
|||
|
||||
src = *ppos;
|
||||
svpfn = src / PM_ENTRY_BYTES;
|
||||
start_vaddr = svpfn << PAGE_SHIFT;
|
||||
end_vaddr = mm->task_size;
|
||||
|
||||
/* watch out for wraparound */
|
||||
if (svpfn > mm->task_size >> PAGE_SHIFT)
|
||||
start_vaddr = end_vaddr;
|
||||
if (svpfn <= (ULONG_MAX >> PAGE_SHIFT))
|
||||
start_vaddr = untagged_addr(svpfn << PAGE_SHIFT);
|
||||
|
||||
/* Ensure the address is inside the task */
|
||||
if (start_vaddr > mm->task_size)
|
||||
start_vaddr = end_vaddr;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -77,4 +77,9 @@
|
|||
#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
|
||||
#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
|
||||
|
||||
#ifdef __GENKSYMS__
|
||||
/* genksyms gets confused by _Static_assert */
|
||||
#define _Static_assert(expr, ...)
|
||||
#endif
|
||||
|
||||
#endif /* _LINUX_BUILD_BUG_H */
|
||||
|
|
|
|||
|
|
@ -36,9 +36,3 @@
|
|||
__has_builtin(__builtin_sub_overflow)
|
||||
#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1
|
||||
#endif
|
||||
|
||||
/* The following are for compatibility with GCC, from compiler-gcc.h,
|
||||
* and may be redefined here because they should not be shared with other
|
||||
* compilers, like ICC.
|
||||
*/
|
||||
#define barrier() __asm__ __volatile__("" : : : "memory")
|
||||
|
|
|
|||
|
|
@ -14,25 +14,6 @@
|
|||
# error Sorry, your compiler is too old - please upgrade it.
|
||||
#endif
|
||||
|
||||
/* Optimization barrier */
|
||||
|
||||
/* The "volatile" is due to gcc bugs */
|
||||
#define barrier() __asm__ __volatile__("": : :"memory")
|
||||
/*
|
||||
* This version is i.e. to prevent dead stores elimination on @ptr
|
||||
* where gcc and llvm may behave differently when otherwise using
|
||||
* normal barrier(): while gcc behavior gets along with a normal
|
||||
* barrier(), llvm needs an explicit input variable to be assumed
|
||||
* clobbered. The issue is as follows: while the inline asm might
|
||||
* access any memory it wants, the compiler could have fit all of
|
||||
* @ptr into memory registers instead, and since @ptr never escaped
|
||||
* from that, it proved that the inline asm wasn't touching any of
|
||||
* it. This version works well with both compilers, i.e. we're telling
|
||||
* the compiler that the inline asm absolutely may see the contents
|
||||
* of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495
|
||||
*/
|
||||
#define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory")
|
||||
|
||||
/*
|
||||
* This macro obfuscates arithmetic on a variable address so that gcc
|
||||
* shouldn't recognize the original var, and make assumptions about it.
|
||||
|
|
|
|||
|
|
@ -80,11 +80,25 @@ void ftrace_likely_update(struct ftrace_likely_data *f, int val,
|
|||
|
||||
/* Optimization barrier */
|
||||
#ifndef barrier
|
||||
# define barrier() __memory_barrier()
|
||||
/* The "volatile" is due to gcc bugs */
|
||||
# define barrier() __asm__ __volatile__("": : :"memory")
|
||||
#endif
|
||||
|
||||
#ifndef barrier_data
|
||||
# define barrier_data(ptr) barrier()
|
||||
/*
|
||||
* This version is i.e. to prevent dead stores elimination on @ptr
|
||||
* where gcc and llvm may behave differently when otherwise using
|
||||
* normal barrier(): while gcc behavior gets along with a normal
|
||||
* barrier(), llvm needs an explicit input variable to be assumed
|
||||
* clobbered. The issue is as follows: while the inline asm might
|
||||
* access any memory it wants, the compiler could have fit all of
|
||||
* @ptr into memory registers instead, and since @ptr never escaped
|
||||
* from that, it proved that the inline asm wasn't touching any of
|
||||
* it. This version works well with both compilers, i.e. we're telling
|
||||
* the compiler that the inline asm absolutely may see the contents
|
||||
* of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495
|
||||
*/
|
||||
# define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory")
|
||||
#endif
|
||||
|
||||
/* workaround for GCC PR82365 if needed */
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@
|
|||
* zsmalloc mapping modes
|
||||
*
|
||||
* NOTE: These only make a difference when a mapped object spans pages.
|
||||
* They also have no effect when PGTABLE_MAPPING is selected.
|
||||
*/
|
||||
enum zs_mapmode {
|
||||
ZS_MM_RW, /* normal read-write mapping */
|
||||
|
|
|
|||
13
mm/Kconfig
13
mm/Kconfig
|
|
@ -576,19 +576,6 @@ config ZSMALLOC
|
|||
returned by an alloc(). This handle must be mapped in order to
|
||||
access the allocated space.
|
||||
|
||||
config PGTABLE_MAPPING
|
||||
bool "Use page table mapping to access object in zsmalloc"
|
||||
depends on ZSMALLOC
|
||||
help
|
||||
By default, zsmalloc uses a copy-based object mapping method to
|
||||
access allocations that span two pages. However, if a particular
|
||||
architecture (ex, ARM) performs VM mapping faster than copying,
|
||||
then you should select this. This causes zsmalloc to use page table
|
||||
mapping rather than copying for object mapping.
|
||||
|
||||
You can check speed with zsmalloc benchmark:
|
||||
https://github.com/spartacus06/zsmapbench
|
||||
|
||||
config ZSMALLOC_STAT
|
||||
bool "Export zsmalloc statistics"
|
||||
depends on ZSMALLOC
|
||||
|
|
|
|||
|
|
@ -293,11 +293,7 @@ struct zspage {
|
|||
};
|
||||
|
||||
struct mapping_area {
|
||||
#ifdef CONFIG_PGTABLE_MAPPING
|
||||
struct vm_struct *vm; /* vm area for mapping object that span pages */
|
||||
#else
|
||||
char *vm_buf; /* copy buffer for objects that span pages */
|
||||
#endif
|
||||
char *vm_addr; /* address of kmap_atomic()'ed pages */
|
||||
enum zs_mapmode vm_mm; /* mapping mode */
|
||||
};
|
||||
|
|
@ -1113,46 +1109,6 @@ static struct zspage *find_get_zspage(struct size_class *class)
|
|||
return zspage;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PGTABLE_MAPPING
|
||||
static inline int __zs_cpu_up(struct mapping_area *area)
|
||||
{
|
||||
/*
|
||||
* Make sure we don't leak memory if a cpu UP notification
|
||||
* and zs_init() race and both call zs_cpu_up() on the same cpu
|
||||
*/
|
||||
if (area->vm)
|
||||
return 0;
|
||||
area->vm = alloc_vm_area(PAGE_SIZE * 2, NULL);
|
||||
if (!area->vm)
|
||||
return -ENOMEM;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void __zs_cpu_down(struct mapping_area *area)
|
||||
{
|
||||
if (area->vm)
|
||||
free_vm_area(area->vm);
|
||||
area->vm = NULL;
|
||||
}
|
||||
|
||||
static inline void *__zs_map_object(struct mapping_area *area,
|
||||
struct page *pages[2], int off, int size)
|
||||
{
|
||||
BUG_ON(map_vm_area(area->vm, PAGE_KERNEL, pages));
|
||||
area->vm_addr = area->vm->addr;
|
||||
return area->vm_addr + off;
|
||||
}
|
||||
|
||||
static inline void __zs_unmap_object(struct mapping_area *area,
|
||||
struct page *pages[2], int off, int size)
|
||||
{
|
||||
unsigned long addr = (unsigned long)area->vm_addr;
|
||||
|
||||
unmap_kernel_range(addr, PAGE_SIZE * 2);
|
||||
}
|
||||
|
||||
#else /* CONFIG_PGTABLE_MAPPING */
|
||||
|
||||
static inline int __zs_cpu_up(struct mapping_area *area)
|
||||
{
|
||||
/*
|
||||
|
|
@ -1233,8 +1189,6 @@ out:
|
|||
pagefault_enable();
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PGTABLE_MAPPING */
|
||||
|
||||
static int zs_cpu_prepare(unsigned int cpu)
|
||||
{
|
||||
struct mapping_area *area;
|
||||
|
|
|
|||
|
|
@ -2008,7 +2008,7 @@ sub reboot_to {
|
|||
|
||||
if ($reboot_type eq "grub") {
|
||||
run_ssh "'(echo \"savedefault --default=$grub_number --once\" | grub --batch)'";
|
||||
} elsif ($reboot_type eq "grub2") {
|
||||
} elsif (($reboot_type eq "grub2") or ($reboot_type eq "grub2bls")) {
|
||||
run_ssh "$grub_reboot $grub_number";
|
||||
} elsif ($reboot_type eq "syslinux") {
|
||||
run_ssh "$syslinux --once \\\"$syslinux_label\\\" $syslinux_path";
|
||||
|
|
|
|||
Loading…
Reference in New Issue