Reset controller fixes for v4.14

Fix SoCFPGA reset controller for 64-bit systems. This patch removes the
 assumption that BITS_PER_LONG is 32, which is not the case on Stratix10.
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlnoTdoXHHAuemFiZWxA
 cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOvbRA//aBLiCj9UaS++2D/hPHwm/oZV
 YjjsfCLg+5XA9kULO2oWZ3Tv2rWGVrLUYEDsBuP1n5jCdXwQLIsvDAXCxw7wQdEb
 2MesVrIzp/0u6qHeIoeF7wrcAjE2KjmzVIvLwEdfAK92LLaSi5QvwD7C9xHQNDAW
 P8uHBjAtMt/jHMp3iyh0tOectKtLzUrRC5dWEyM9XJIc4P1cmz5CyyyNP+CGyJpL
 XEI9vudNl3MQEosZoTMUSjuH+ct2BglYZiyw4nKCV0MkIjeWF71SqzcvuUraFd1M
 bebN4FPM+Q/7jX59flt6WZvthiXHy9VdQePdWFAPxFtI2/lxU8yvyTKIA8xn9uXs
 t7blnI/FU+4bAxnWfWf6nlyX5nHAbB44LZqXmMqz1g3WWuiv+kpWK9/L61AToGAB
 fkc0f6D1qLDbbOz/pynhFLOhQg3BYjvkLlOCxr6mKYS+3PMH+fVKzxsSfxmJy2Mx
 FcQZ1h96CRySEXIiXD1xEqCL29xzjC1gEJdHIEM0FP7OHkctXhwRLlk57+O3NWo7
 vCcAQHrxdez27CuLm4HruJf/ne8WvHHO8k+093tlMIgXlxcbIZRoCRgdlYKElbYI
 mu0TrvRvdz/kXRMcA6aUJCCckKQAlG54Qbfo8Mjuv6V/rr3N8X/z0LpgLzrtx/C0
 2sWZW+3J3LmwAqy+PoM=
 =VEC4
 -----END PGP SIGNATURE-----

Merge tag 'reset-fixes-for-4.14-2' of git://git.pengutronix.de/git/pza/linux into fixes

Pull "Reset controller fixes for v4.14" from Philipp Zabel:

Fix SoCFPGA reset controller for 64-bit systems. This patch removes the
assumption that BITS_PER_LONG is 32, which is not the case on Stratix10.

* tag 'reset-fixes-for-4.14-2' of git://git.pengutronix.de/git/pza/linux:
  reset: socfpga: fix for 64-bit compilation
This commit is contained in:
Arnd Bergmann 2017-10-19 17:43:43 +02:00
commit be2f9d36b2

View file

@ -40,8 +40,9 @@ static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
struct socfpga_reset_data *data = container_of(rcdev,
struct socfpga_reset_data,
rcdev);
int bank = id / BITS_PER_LONG;
int offset = id % BITS_PER_LONG;
int reg_width = sizeof(u32);
int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
unsigned long flags;
u32 reg;
@ -61,8 +62,9 @@ static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
struct socfpga_reset_data,
rcdev);
int bank = id / BITS_PER_LONG;
int offset = id % BITS_PER_LONG;
int reg_width = sizeof(u32);
int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
unsigned long flags;
u32 reg;
@ -81,8 +83,9 @@ static int socfpga_reset_status(struct reset_controller_dev *rcdev,
{
struct socfpga_reset_data *data = container_of(rcdev,
struct socfpga_reset_data, rcdev);
int bank = id / BITS_PER_LONG;
int offset = id % BITS_PER_LONG;
int reg_width = sizeof(u32);
int bank = id / (reg_width * BITS_PER_BYTE);
int offset = id % (reg_width * BITS_PER_BYTE);
u32 reg;
reg = readl(data->membase + (bank * BANK_INCREMENT));
@ -132,7 +135,7 @@ static int socfpga_reset_probe(struct platform_device *pdev)
spin_lock_init(&data->lock);
data->rcdev.owner = THIS_MODULE;
data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE);
data->rcdev.ops = &socfpga_reset_ops;
data->rcdev.of_node = pdev->dev.of_node;