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drm/nouveau: finalise nvkm namespace switch (no binary change) 

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
hifive-unleashed-5.1
Ben Skeggs 2015-01-14 15:36:34 +10:00
parent 9719047b4d
commit be83cd4ef9
44 changed files with 329 additions and 594 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/nouveau/dispnv04/crtc.c
View File

@ -112,12 +112,12 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
{
struct drm_device *dev = crtc->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_bios *bios = nvxx_bios(&drm->device);
struct nouveau_clk *clk = nvxx_clk(&drm->device);
struct nvkm_bios *bios = nvxx_bios(&drm->device);
struct nvkm_clk *clk = nvxx_clk(&drm->device);
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];
struct nouveau_pll_vals *pv = &regp->pllvals;
struct nvkm_pll_vals *pv = &regp->pllvals;
struct nvbios_pll pll_lim;
if (nvbios_pll_parse(bios, nv_crtc->index ? PLL_VPLL1 : PLL_VPLL0,

22
drivers/gpu/drm/nouveau/dispnv04/dac.c
View File

@ -66,7 +66,7 @@ int nv04_dac_output_offset(struct drm_encoder *encoder)
static int sample_load_twice(struct drm_device *dev, bool sense[2])
{
struct nvif_device *device = &nouveau_drm(dev)->device;
struct nouveau_timer *ptimer = nvxx_timer(device);
struct nvkm_timer *ptimer = nvxx_timer(device);
int i;
for (i = 0; i < 2; i++) {
@ -80,17 +80,17 @@ static int sample_load_twice(struct drm_device *dev, bool sense[2])
* use a 10ms timeout (guards against crtc being inactive, in
* which case blank state would never change)
*/
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
return -EBUSY;
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000001))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000001))
return -EBUSY;
if (!nouveau_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (!nvkm_timer_wait_eq(ptimer, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
return -EBUSY;
udelay(100);
@ -232,7 +232,7 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &nouveau_drm(dev)->device;
struct nouveau_gpio *gpio = nvxx_gpio(device);
struct nvkm_gpio *gpio = nvxx_gpio(device);
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,

6
drivers/gpu/drm/nouveau/dispnv04/dfp.c
View File

@ -623,9 +623,9 @@ static void nv04_tmds_slave_init(struct drm_encoder *encoder)
struct drm_device *dev = encoder->dev;
struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_i2c_port *port = i2c->find(i2c, 2);
struct nouveau_i2c_board_info info[] = {
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c_port *port = i2c->find(i2c, 2);
struct nvkm_i2c_board_info info[] = {
{
{
.type = "sil164",

2
drivers/gpu/drm/nouveau/dispnv04/disp.c
View File

@ -35,7 +35,7 @@ int
nv04_display_create(struct drm_device *dev)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct dcb_table *dcb = &drm->vbios.dcb;
struct drm_connector *connector, *ct;
struct drm_encoder *encoder;

4
drivers/gpu/drm/nouveau/dispnv04/disp.h
View File

@ -36,7 +36,7 @@ struct nv04_crtc_reg {
/* PRAMDAC regs */
uint32_t nv10_cursync;
struct nouveau_pll_vals pllvals;
struct nvkm_pll_vals pllvals;
uint32_t ramdac_gen_ctrl;
uint32_t ramdac_630;
uint32_t ramdac_634;
@ -170,7 +170,7 @@ nouveau_bios_run_init_table(struct drm_device *dev, u16 table,
struct dcb_output *outp, int crtc)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_bios *bios = nvxx_bios(&drm->device);
struct nvkm_bios *bios = nvxx_bios(&drm->device);
struct nvbios_init init = {
.subdev = nv_subdev(bios),
.bios = bios,

24
drivers/gpu/drm/nouveau/dispnv04/hw.c
View File

@ -130,7 +130,7 @@ NVBlankScreen(struct drm_device *dev, int head, bool blank)
static void
nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
uint32_t pll2, struct nouveau_pll_vals *pllvals)
uint32_t pll2, struct nvkm_pll_vals *pllvals)
{
struct nouveau_drm *drm = nouveau_drm(dev);
@ -162,11 +162,11 @@ nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
int
nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
struct nouveau_pll_vals *pllvals)
struct nvkm_pll_vals *pllvals)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_bios *bios = nvxx_bios(device);
struct nvkm_bios *bios = nvxx_bios(device);
uint32_t reg1, pll1, pll2 = 0;
struct nvbios_pll pll_lim;
int ret;
@ -202,7 +202,7 @@ nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
}
int
nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pv)
nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pv)
{
/* Avoid divide by zero if called at an inappropriate time */
if (!pv->M1 || !pv->M2)
@ -214,7 +214,7 @@ nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pv)
int
nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
{
struct nouveau_pll_vals pllvals;
struct nvkm_pll_vals pllvals;
int ret;
if (plltype == PLL_MEMORY &&
@ -253,10 +253,10 @@ nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head)
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_clk *clk = nvxx_clk(device);
struct nouveau_bios *bios = nvxx_bios(device);
struct nvkm_clk *clk = nvxx_clk(device);
struct nvkm_bios *bios = nvxx_bios(device);
struct nvbios_pll pll_lim;
struct nouveau_pll_vals pv;
struct nvkm_pll_vals pv;
enum nvbios_pll_type pll = head ? PLL_VPLL1 : PLL_VPLL0;
if (nvbios_pll_parse(bios, pll, &pll_lim))
@ -463,7 +463,7 @@ nv_load_state_ramdac(struct drm_device *dev, int head,
struct nv04_mode_state *state)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_clk *clk = nvxx_clk(&drm->device);
struct nvkm_clk *clk = nvxx_clk(&drm->device);
struct nv04_crtc_reg *regp = &state->crtc_reg[head];
uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF;
int i;
@ -661,7 +661,7 @@ nv_load_state_ext(struct drm_device *dev, int head,
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_timer *ptimer = nvxx_timer(device);
struct nvkm_timer *ptimer = nvxx_timer(device);
struct nv04_crtc_reg *regp = &state->crtc_reg[head];
uint32_t reg900;
int i;
@ -741,8 +741,8 @@ nv_load_state_ext(struct drm_device *dev, int head,
if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) {
/* Not waiting for vertical retrace before modifying
CRE_53/CRE_54 causes lockups. */
nouveau_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
nouveau_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
nvkm_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
nvkm_timer_wait_eq(ptimer, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
}
wr_cio_state(dev, head, regp, NV_CIO_CRE_42);

4
drivers/gpu/drm/nouveau/dispnv04/hw.h
View File

@ -42,8 +42,8 @@ uint8_t NVReadVgaGr(struct drm_device *, int head, uint8_t index);
void NVSetOwner(struct drm_device *, int owner);
void NVBlankScreen(struct drm_device *, int head, bool blank);
int nouveau_hw_get_pllvals(struct drm_device *, enum nvbios_pll_type plltype,
struct nouveau_pll_vals *pllvals);
int nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pllvals);
struct nvkm_pll_vals *pllvals);
int nouveau_hw_pllvals_to_clk(struct nvkm_pll_vals *pllvals);
int nouveau_hw_get_clock(struct drm_device *, enum nvbios_pll_type plltype);
void nouveau_hw_save_vga_fonts(struct drm_device *, bool save);
void nouveau_hw_save_state(struct drm_device *, int head,

8
drivers/gpu/drm/nouveau/dispnv04/tvnv04.c
View File

@ -35,7 +35,7 @@
#include <drm/i2c/ch7006.h>
static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
static struct nvkm_i2c_board_info nv04_tv_encoder_info[] = {
{
{
I2C_BOARD_INFO("ch7006", 0x75),
@ -54,7 +54,7 @@ static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
int nv04_tv_identify(struct drm_device *dev, int i2c_index)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
return i2c->identify(i2c, i2c_index, "TV encoder",
nv04_tv_encoder_info, NULL, NULL);
@ -204,8 +204,8 @@ nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
struct drm_encoder *encoder;
struct drm_device *dev = connector->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_i2c_port *port = i2c->find(i2c, entry->i2c_index);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c_port *port = i2c->find(i2c, entry->i2c_index);
int type, ret;
/* Ensure that we can talk to this encoder */

4
drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
View File

@ -46,7 +46,7 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
{
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_gpio *gpio = nvxx_gpio(&drm->device);
struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
@ -370,7 +370,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
{
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_gpio *gpio = nvxx_gpio(&drm->device);
struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
struct nv17_tv_state *regs = &to_tv_enc(encoder)->state;
struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);

2
drivers/gpu/drm/nouveau/include/nvif/client.h
View File

@ -33,7 +33,7 @@ int nvif_client_resume(struct nvif_client *);
#include <core/client.h>
#define nvxx_client(a) ({ \
struct nvif_client *_client = nvif_client(nvif_object(a)); \
nouveau_client(_client->base.priv); \
nvkm_client(_client->base.priv); \
})
#endif

24
drivers/gpu/drm/nouveau/include/nvif/device.h
View File

@ -38,24 +38,24 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **);
#include <subdev/therm.h>
#define nvxx_device(a) nv_device(nvxx_object((a)))
#define nvxx_bios(a) nouveau_bios(nvxx_device(a))
#define nvxx_fb(a) nouveau_fb(nvxx_device(a))
#define nvxx_mmu(a) nouveau_mmu(nvxx_device(a))
#define nvxx_bar(a) nouveau_bar(nvxx_device(a))
#define nvxx_gpio(a) nouveau_gpio(nvxx_device(a))
#define nvxx_clk(a) nouveau_clk(nvxx_device(a))
#define nvxx_i2c(a) nouveau_i2c(nvxx_device(a))
#define nvxx_timer(a) nouveau_timer(nvxx_device(a))
#define nvxx_bios(a) nvkm_bios(nvxx_device(a))
#define nvxx_fb(a) nvkm_fb(nvxx_device(a))
#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a))
#define nvxx_bar(a) nvkm_bar(nvxx_device(a))
#define nvxx_gpio(a) nvkm_gpio(nvxx_device(a))
#define nvxx_clk(a) nvkm_clk(nvxx_device(a))
#define nvxx_i2c(a) nvkm_i2c(nvxx_device(a))
#define nvxx_timer(a) nvkm_timer(nvxx_device(a))
#define nvxx_wait(a,b,c,d) nv_wait(nvxx_timer(a), (b), (c), (d))
#define nvxx_wait_cb(a,b,c) nv_wait_cb(nvxx_timer(a), (b), (c))
#define nvxx_therm(a) nouveau_therm(nvxx_device(a))
#define nvxx_therm(a) nvkm_therm(nvxx_device(a))
#include <core/device.h>
#include <engine/fifo.h>
#include <engine/gr.h>
#include <engine/sw.h>
#define nvxx_fifo(a) nouveau_fifo(nvxx_device(a))
#define nvxx_fifo_chan(a) ((struct nouveau_fifo_chan *)nvxx_object(a))
#define nvxx_gr(a) ((struct nouveau_gr *)nouveau_engine(nvxx_object(a), NVDEV_ENGINE_GR))
#define nvxx_fifo(a) nvkm_fifo(nvxx_device(a))
#define nvxx_fifo_chan(a) ((struct nvkm_fifo_chan *)nvxx_object(a))
#define nvxx_gr(a) ((struct nvkm_gr *)nvkm_engine(nvxx_object(a), NVDEV_ENGINE_GR))
#endif

2
drivers/gpu/drm/nouveau/include/nvif/object.h
View File

@ -70,6 +70,6 @@ void nvif_object_unmap(struct nvif_object *);
/*XXX*/
#include <core/object.h>
#define nvxx_object(a) ((struct nouveau_object *)nvif_object(a)->priv)
#define nvxx_object(a) ((struct nvkm_object *)nvif_object(a)->priv)
#endif

255
drivers/gpu/drm/nouveau/include/nvkm/core/os.h
View File

@ -1,259 +1,4 @@
#ifndef __NVKM_OS_H__
#define __NVKM_OS_H__
#include <nvif/os.h>
#define nouveau_client nvkm_client
#define nouveau_client_name nvkm_client_name
#define nouveau_client_create nvkm_client_create
#define nouveau_client_init nvkm_client_init
#define nouveau_client_fini nvkm_client_fini
#define nouveau_engctx nvkm_engctx
#define nouveau_engctx_create nvkm_engctx_create
#define nouveau_engctx_create_ nvkm_engctx_create_
#define nouveau_engctx_destroy nvkm_engctx_destroy
#define nouveau_engctx_init nvkm_engctx_init
#define nouveau_engctx_fini nvkm_engctx_fini
#define _nouveau_engctx_ctor _nvkm_engctx_ctor
#define _nouveau_engctx_dtor _nvkm_engctx_dtor
#define _nouveau_engctx_init _nvkm_engctx_init
#define _nouveau_engctx_fini _nvkm_engctx_fini
#define _nouveau_engctx_rd32 _nvkm_engctx_rd32
#define _nouveau_engctx_wr32 _nvkm_engctx_wr32
#define nouveau_engctx_get nvkm_engctx_get
#define nouveau_engctx_put nvkm_engctx_put
#define nouveau_engine nvkm_engine
#define nouveau_engine_create nvkm_engine_create
#define nouveau_engine_create_ nvkm_engine_create_
#define nouveau_engine_destroy nvkm_engine_destroy
#define nouveau_engine_init nvkm_engine_init
#define nouveau_engine_fini nvkm_engine_fini
#define _nouveau_engine_ctor _nvkm_engine_ctor
#define _nouveau_engine_dtor _nvkm_engine_dtor
#define _nouveau_engine_init _nvkm_engine_init
#define _nouveau_engine_fini _nvkm_engine_fini
#define nouveau_enum nvkm_enum
#define nouveau_gpuobj nvkm_gpuobj
#define nouveau_gpuobj_create nvkm_gpuobj_create
#define nouveau_gpuobj_destroy nvkm_gpuobj_destroy
#define _nouveau_gpuobj_ctor _nvkm_gpuobj_ctor
#define _nouveau_gpuobj_dtor _nvkm_gpuobj_dtor
#define _nouveau_gpuobj_init _nvkm_gpuobj_init
#define _nouveau_gpuobj_fini _nvkm_gpuobj_fini
#define _nouveau_gpuobj_rd32 _nvkm_gpuobj_rd32
#define _nouveau_gpuobj_wr32 _nvkm_gpuobj_wr32
#define nouveau_gpuobj_new nvkm_gpuobj_new
#define nouveau_gpuobj_dup nvkm_gpuobj_dup
#define nouveau_gpuobj_ref nvkm_gpuobj_ref
#define nouveau_gpuobj_map nvkm_gpuobj_map
#define nouveau_gpuobj_map_vm nvkm_gpuobj_map_vm
#define nouveau_gpuobj_unmap nvkm_gpuobj_unmap
#define nouveau_handle nvkm_handle
#define nouveau_handle_ref nvkm_handle_ref
#define nouveau_handle_put nvkm_handle_put
#define nouveau_handle_get_class nvkm_handle_get_class
#define nouveau_handle_get_vinst nvkm_handle_get_vinst
#define nouveau_handle_get_cinst nvkm_handle_get_cinst
#define nouveau_mm nvkm_mm
#define nouveau_mm_node nvkm_mm_node
#define nouveau_mm_init nvkm_mm_init
#define nouveau_mm_fini nvkm_mm_fini
#define nouveau_mm_head nvkm_mm_head
#define nouveau_mm_tail nvkm_mm_tail
#define nouveau_mm_free nvkm_mm_free
#define nouveau_mm_initialised nvkm_mm_initialised
#define nouveau_namedb nvkm_namedb
#define nouveau_namedb_create nvkm_namedb_create
#define nouveau_namedb_create_ nvkm_namedb_create_
#define nouveau_namedb_destroy nvkm_namedb_destroy
#define nouveau_namedb_init nvkm_namedb_init
#define nouveau_namedb_fini nvkm_namedb_fini
#define _nouveau_namedb_ctor _nvkm_namedb_ctor
#define _nouveau_namedb_dtor _nvkm_namedb_dtor
#define _nouveau_namedb_init _nvkm_namedb_init
#define _nouveau_namedb_fini _nvkm_namedb_fini
#define nouveau_namedb_ref nvkm_namedb_ref
#define nouveau_namedb_put nvkm_namedb_put
#define nouveau_namedb_get nvkm_namedb_get
#define nouveau_namedb_get_class nvkm_namedb_get_class
#define nouveau_namedb_get_vinst nvkm_namedb_get_vinst
#define nouveau_namedb_get_cinst nvkm_namedb_get_cinst
#define nouveau_object_debug nvkm_object_debug
#define nouveau_object nvkm_object
#define nouveau_object_create nvkm_object_create
#define nouveau_object_create_ nvkm_object_create_
#define nouveau_object_destroy nvkm_object_destroy
#define nouveau_object_init nvkm_object_init
#define nouveau_object_fini nvkm_object_fini
#define _nouveau_object_ctor _nvkm_object_ctor
#define nouveau_object_ctor nvkm_object_ctor
#define nouveau_object_ref nvkm_object_ref
#define nouveau_object_ofuncs nvkm_object_ofuncs
#define nouveau_object_inc nvkm_object_inc
#define nouveau_object_dec nvkm_object_dec
#define nouveau_ofuncs nvkm_ofuncs
#define nouveau_oclass nvkm_oclass
#define nouveau_omthds nvkm_omthds
#define nouveau_parent nvkm_parent
#define nouveau_parent_create nvkm_parent_create
#define nouveau_parent_create_ nvkm_parent_create_
#define nouveau_parent_destroy nvkm_parent_destroy
#define nouveau_parent_init nvkm_parent_init
#define nouveau_parent_fini nvkm_parent_fini
#define _nouveau_parent_ctor _nvkm_parent_ctor
#define _nouveau_parent_dtor _nvkm_parent_dtor
#define _nouveau_parent_init _nvkm_parent_init
#define _nouveau_parent_fini _nvkm_parent_fini
#define nouveau_printk nvkm_printk
#define nouveau_ramht nvkm_ramht
#define nouveau_ramht_new nvkm_ramht_new
#define nouveau_ramht_ref nvkm_ramht_ref
#define nouveau_ramht_insert nvkm_ramht_insert
#define nouveau_ramht_remove nvkm_ramht_remove
#define nouveau_subdev nvkm_subdev
#define nouveau_subdev_create nvkm_subdev_create
#define nouveau_subdev_create_ nvkm_subdev_create_
#define nouveau_subdev_destroy nvkm_subdev_destroy
#define nouveau_subdev_init nvkm_subdev_init
#define nouveau_subdev_fini nvkm_subdev_fini
#define _nouveau_subdev_ctor _nvkm_subdev_ctor
#define _nouveau_subdev_dtor _nvkm_subdev_dtor
#define _nouveau_subdev_init _nvkm_subdev_init
#define _nouveau_subdev_fini _nvkm_subdev_fini
#define nouveau_subdev_reset nvkm_subdev_reset
#define nouveau_bitfield nvkm_bitfield
#define nouveau_bitfield_print nvkm_bitfield_print
#define nouveau_enum nvkm_enum
#define nouveau_enum_find nvkm_enum_find
#define nouveau_enum_print nvkm_enum_print
#define nouveau_stropt nvkm_stropt
#define nouveau_boolopt nvkm_boolopt
#define nouveau_dbgopt nvkm_dbgopt
#define nouveau_device nvkm_device
#define nouveau_device_find nvkm_device_find
#define nouveau_device_list nvkm_device_list
#define nouveau_vma nvkm_vma
#define nouveau_vm nvkm_vm
#define nouveau_vm_get nvkm_vm_get
#define nouveau_vm_put nvkm_vm_put
#define nouveau_vm_map nvkm_vm_map
#define nouveau_vm_unmap nvkm_vm_unmap
#define nouveau_vm_new nvkm_vm_new
#define nouveau_vm_ref nvkm_vm_ref
#define nouveau_instmem nvkm_instmem
#define nouveau_instobj nvkm_instobj
#define nouveau_mem nvkm_mem
#define nouveau_bar nvkm_bar
#define nouveau_falcon nvkm_falcon
#define nouveau_falcon_create nvkm_falcon_create
#define nouveau_falcon_create_ nvkm_falcon_create_
#define nouveau_falcon_destroy nvkm_falcon_destroy
#define nouveau_falcon_init nvkm_falcon_init
#define nouveau_falcon_fini nvkm_falcon_fini
#define _nouveau_falcon_ctor _nvkm_falcon_ctor
#define _nouveau_falcon_dtor _nvkm_falcon_dtor
#define _nouveau_falcon_init _nvkm_falcon_init
#define _nouveau_falcon_fini _nvkm_falcon_fini
#define _nouveau_falcon_rd32 _nvkm_falcon_rd32
#define _nouveau_falcon_wr32 _nvkm_falcon_wr32
#define nouveau_falcon_context nvkm_falcon_context
#define nouveau_falcon_context_create nvkm_falcon_context_create
#define nouveau_falcon_context_create_ nvkm_falcon_context_create_
#define nouveau_falcon_context_destroy nvkm_falcon_context_destroy
#define nouveau_falcon_context_init nvkm_falcon_context_init
#define nouveau_falcon_context_fini nvkm_falcon_context_fini
#define _nouveau_falcon_context_ctor _nvkm_falcon_context_ctor
#define _nouveau_falcon_context_dtor _nvkm_falcon_context_dtor
#define _nouveau_falcon_context_init _nvkm_falcon_context_init
#define _nouveau_falcon_context_fini _nvkm_falcon_context_fini
#define _nouveau_falcon_context_rd32 _nvkm_falcon_context_rd32
#define _nouveau_falcon_context_wr32 _nvkm_falcon_context_wr32
#define nouveau_falcon_intr nvkm_falcon_intr
#define nouveau_xtensa nvkm_xtensa
#define nouveau_xtensa_create nvkm_xtensa_create
#define nouveau_xtensa_create_ nvkm_xtensa_create_
#define nouveau_xtensa_destroy nvkm_xtensa_destroy
#define nouveau_xtensa_init nvkm_xtensa_init
#define nouveau_xtensa_fini nvkm_xtensa_fini
#define _nouveau_xtensa_ctor _nvkm_xtensa_ctor
#define _nouveau_xtensa_dtor _nvkm_xtensa_dtor
#define _nouveau_xtensa_init _nvkm_xtensa_init
#define _nouveau_xtensa_fini _nvkm_xtensa_fini
#define _nouveau_xtensa_rd32 _nvkm_xtensa_rd32
#define _nouveau_xtensa_wr32 _nvkm_xtensa_wr32
#define nouveau_xtensa_context nvkm_xtensa_context
#define nouveau_xtensa_context_create nvkm_xtensa_context_create
#define nouveau_xtensa_context_create_ nvkm_xtensa_context_create_
#define nouveau_xtensa_context_destroy nvkm_xtensa_context_destroy
#define nouveau_xtensa_context_init nvkm_xtensa_context_init
#define nouveau_xtensa_context_fini nvkm_xtensa_context_fini
#define _nouveau_xtensa_engctx_ctor _nvkm_xtensa_engctx_ctor
#define _nouveau_xtensa_context_dtor _nvkm_xtensa_context_dtor
#define _nouveau_xtensa_context_init _nvkm_xtensa_context_init
#define _nouveau_xtensa_context_fini _nvkm_xtensa_context_fini
#define _nouveau_xtensa_context_rd32 _nvkm_xtensa_context_rd32
#define _nouveau_xtensa_context_wr32 _nvkm_xtensa_context_wr32
#define nouveau_xtensa_intr nvkm_xtensa_intr
#define nouveau_gpio nvkm_gpio
#define nouveau_i2c nvkm_i2c
#define nouveau_i2c_port nvkm_i2c_port
#define nouveau_i2c_board_info nvkm_i2c_board_info
#define nouveau_devinit nvkm_devinit
#define nouveau_bios nvkm_bios
#define nouveau_bios_oclass nvkm_bios_oclass
#define nouveau_pll_vals nvkm_pll_vals
#define nouveau_therm_trip_point nvkm_therm_trip_point
#define nouveau_fb nvkm_fb
#define nouveau_fifo nvkm_fifo
#define nouveau_therm nvkm_therm
#define nouveau_therm_cstate nvkm_therm_cstate
#define nouveau_volt nvkm_volt
#define nouveau_timer nvkm_timer
#define nouveau_timer_wait_eq nvkm_timer_wait_eq
#define nouveau_timer_alarm nvkm_timer_alarm
#define nouveau_alarm nvkm_alarm
#define nouveau_timer_alarm_cancel nvkm_timer_alarm_cancel
#define nouveau_alarm_init nvkm_alarm_init
#define nva3_pll_calc gt215_pll_calc
#define nouveau_clk nvkm_clk
#define nouveau_domain nvkm_domain
#define nouveau_cstate nvkm_cstate
#define nouveau_pstate nvkm_pstate
#define nouveau_clk_astate nvkm_clk_astate
#define nouveau_clk_ustate nvkm_clk_ustate
#define nva3_clk_pre gt215_clk_pre
#define nva3_clk_post gt215_clk_post
#define nva3_clk_info gt215_clk_info
#define nva3_pll_info gt215_pll_info
#define nouveau_ibus nvkm_ibus
#define nouveau_memx nvkm_memx
#define nouveau_memx_block nvkm_memx_block
#define nouveau_memx_unblock nvkm_memx_unblock
#define nouveau_memx_train nvkm_memx_train
#define nouveau_memx_train_result nvkm_memx_train_result
#define nouveau_memx_wait_vblank nvkm_memx_wait_vblank
#define nouveau_memx_rd32 nvkm_memx_rd32
#define nouveau_memx_wr32 nvkm_memx_wr32
#define nouveau_memx_wait nvkm_memx_wait
#define nouveau_memx_init nvkm_memx_init
#define nouveau_memx_fini nvkm_memx_fini
#define nouveau_memx_nsec nvkm_memx_nsec
#define nouveau_ltc nvkm_ltc
#define nouveau_pmu nvkm_pmu
#define nouveau_fb nvkm_fb
#define nouveau_fb_tile nvkm_fb_tile
#define nvc0_pte_storage_type_map gf100_pte_storage_type_map
#define nouveau_fuse nvkm_fuse
#define nouveau_mc nvkm_mc
#define nouveau_mmu nvkm_mmu
#define nouveau_dmaeng nvkm_dmaeng
#define nouveau_dmaobj nvkm_dmaobj
#define nouveau_disp nvkm_disp
#define nouveau_fifo_chan nvkm_fifo_chan
#define nouveau_fifo nvkm_fifo
#define nouveau_gr nvkm_gr
#define nouveau_sw nvkm_sw
#define nouveau_sw_chan nvkm_sw_chan
#define nouveau_device_create nvkm_device_create
#define nouveau_device_create_ nvkm_device_create_
#endif

43
drivers/gpu/drm/nouveau/include/nvkm/subdev/mxm.h
View File

@ -1,37 +1,34 @@
#ifndef __NOUVEAU_MXM_H__
#define __NOUVEAU_MXM_H__
#ifndef __NVKM_MXM_H__
#define __NVKM_MXM_H__
#include <core/subdev.h>
#include <core/device.h>
#define MXM_SANITISE_DCB 0x00000001
struct nouveau_mxm {
struct nouveau_subdev base;
struct nvkm_mxm {
struct nvkm_subdev base;
u32 action;
u8 *mxms;
};
static inline struct nouveau_mxm *
nouveau_mxm(void *obj)
static inline struct nvkm_mxm *
nvkm_mxm(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_MXM);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_MXM);
}
#define nouveau_mxm_create(p,e,o,d) \
nouveau_mxm_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_mxm_init(p) \
nouveau_subdev_init(&(p)->base)
#define nouveau_mxm_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))
int nouveau_mxm_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **);
void nouveau_mxm_destroy(struct nouveau_mxm *);
#define nvkm_mxm_create(p,e,o,d) \
nvkm_mxm_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nvkm_mxm_init(p) \
nvkm_subdev_init(&(p)->base)
#define nvkm_mxm_fini(p,s) \
nvkm_subdev_fini(&(p)->base, (s))
int nvkm_mxm_create_(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, int, void **);
void nvkm_mxm_destroy(struct nvkm_mxm *);
#define _nouveau_mxm_dtor _nouveau_subdev_dtor
#define _nouveau_mxm_init _nouveau_subdev_init
#define _nouveau_mxm_fini _nouveau_subdev_fini
extern struct nouveau_oclass nv50_mxm_oclass;
#define _nvkm_mxm_dtor _nvkm_subdev_dtor
#define _nvkm_mxm_init _nvkm_subdev_init
#define _nvkm_mxm_fini _nvkm_subdev_fini
extern struct nvkm_oclass nv50_mxm_oclass;
#endif

16
drivers/gpu/drm/nouveau/nouveau_abi16.c
View File

@ -100,7 +100,7 @@ static void
nouveau_abi16_ntfy_fini(struct nouveau_abi16_chan *chan,
struct nouveau_abi16_ntfy *ntfy)
{
nouveau_mm_free(&chan->heap, &ntfy->node);
nvkm_mm_free(&chan->heap, &ntfy->node);
list_del(&ntfy->head);
kfree(ntfy);
}
@ -128,7 +128,7 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16,
}
if (chan->heap.block_size)
nouveau_mm_fini(&chan->heap);
nvkm_mm_fini(&chan->heap);
/* destroy channel object, all children will be killed too */
if (chan->chan) {
@ -164,8 +164,8 @@ nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
struct nouveau_cli *cli = nouveau_cli(file_priv);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nouveau_timer *ptimer = nvxx_timer(device);
struct nouveau_gr *gr = nvxx_gr(device);
struct nvkm_timer *ptimer = nvxx_timer(device);
struct nvkm_gr *gr = nvxx_gr(device);
struct drm_nouveau_getparam *getparam = data;
switch (getparam->param) {
@ -324,7 +324,7 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
if (ret)
goto done;
ret = nouveau_mm_init(&chan->heap, 0, PAGE_SIZE, 1);
ret = nvkm_mm_init(&chan->heap, 0, PAGE_SIZE, 1);
done:
if (ret)
nouveau_abi16_chan_fini(abi16, chan);
@ -448,8 +448,8 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
list_add(&ntfy->head, &chan->notifiers);
ntfy->handle = info->handle;
ret = nouveau_mm_head(&chan->heap, 0, 1, info->size, info->size, 1,
&ntfy->node);
ret = nvkm_mm_head(&chan->heap, 0, 1, info->size, info->size, 1,
&ntfy->node);
if (ret)
goto done;
@ -527,7 +527,7 @@ nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS)
/* cleanup extra state if this object was a notifier */
list_for_each_entry(ntfy, &chan->notifiers, head) {
if (ntfy->handle == fini->handle) {
nouveau_mm_free(&chan->heap, &ntfy->node);
nvkm_mm_free(&chan->heap, &ntfy->node);
list_del(&ntfy->head);
break;
}

6
drivers/gpu/drm/nouveau/nouveau_abi16.h
View File

@ -14,7 +14,7 @@ int nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS);
struct nouveau_abi16_ntfy {
struct list_head head;
struct nouveau_mm_node *node;
struct nvkm_mm_node *node;
u32 handle;
};
@ -23,8 +23,8 @@ struct nouveau_abi16_chan {
struct nouveau_channel *chan;
struct list_head notifiers;
struct nouveau_bo *ntfy;
struct nouveau_vma ntfy_vma;
struct nouveau_mm heap;
struct nvkm_vma ntfy_vma;
struct nvkm_mm heap;
};
struct nouveau_abi16 {

2
drivers/gpu/drm/nouveau/nouveau_bios.c
View File

@ -2009,7 +2009,7 @@ uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
static bool NVInitVBIOS(struct drm_device *dev)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_bios *bios = nvxx_bios(&drm->device);
struct nvkm_bios *bios = nvxx_bios(&drm->device);
struct nvbios *legacy = &drm->vbios;
memset(legacy, 0, sizeof(struct nvbios));

92
drivers/gpu/drm/nouveau/nouveau_bo.c
View File

@ -48,9 +48,9 @@ nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
{
struct nouveau_drm *drm = nouveau_drm(dev);
int i = reg - drm->tile.reg;
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
struct nouveau_fb_tile *tile = &pfb->tile.region[i];
struct nouveau_engine *engine;
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
struct nvkm_fb_tile *tile = &pfb->tile.region[i];
struct nvkm_engine *engine;
nouveau_fence_unref(&reg->fence);
@ -62,9 +62,9 @@ nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
pfb->tile.prog(pfb, i, tile);
if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_GR)))
if ((engine = nvkm_engine(pfb, NVDEV_ENGINE_GR)))
engine->tile_prog(engine, i);
if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_MPEG)))
if ((engine = nvkm_engine(pfb, NVDEV_ENGINE_MPEG)))
engine->tile_prog(engine, i);
}
@ -105,7 +105,7 @@ nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
u32 size, u32 pitch, u32 flags)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
struct nouveau_drm_tile *tile, *found = NULL;
int i;
@ -325,7 +325,7 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype, bool contig)
memtype == TTM_PL_FLAG_VRAM && contig) {
if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
if (bo->mem.mem_type == TTM_PL_VRAM) {
struct nouveau_mem *mem = bo->mem.mm_node;
struct nvkm_mem *mem = bo->mem.mm_node;
if (!list_is_singular(&mem->regions))
evict = true;
}
@ -459,7 +459,7 @@ void
nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
{
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
struct nouveau_device *device = nvxx_device(&drm->device);
struct nvkm_device *device = nvxx_device(&drm->device);
struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
int i;
@ -479,7 +479,7 @@ void
nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
{
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
struct nouveau_device *device = nvxx_device(&drm->device);
struct nvkm_device *device = nvxx_device(&drm->device);
struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
int i;
@ -695,7 +695,7 @@ static int
nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
int ret = RING_SPACE(chan, 10);
if (ret == 0) {
BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);
@ -727,7 +727,7 @@ static int
nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
u64 src_offset = node->vma[0].offset;
u64 dst_offset = node->vma[1].offset;
u32 page_count = new_mem->num_pages;
@ -765,7 +765,7 @@ static int
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
u64 src_offset = node->vma[0].offset;
u64 dst_offset = node->vma[1].offset;
u32 page_count = new_mem->num_pages;
@ -804,7 +804,7 @@ static int
nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
u64 src_offset = node->vma[0].offset;
u64 dst_offset = node->vma[1].offset;
u32 page_count = new_mem->num_pages;
@ -842,7 +842,7 @@ static int
nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
int ret = RING_SPACE(chan, 7);
if (ret == 0) {
BEGIN_NV04(chan, NvSubCopy, 0x0320, 6);
@ -860,7 +860,7 @@ static int
nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
int ret = RING_SPACE(chan, 7);
if (ret == 0) {
BEGIN_NV04(chan, NvSubCopy, 0x0304, 6);
@ -894,12 +894,12 @@ static int
nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
{
struct nouveau_mem *node = old_mem->mm_node;
struct nvkm_mem *node = old_mem->mm_node;
u64 length = (new_mem->num_pages << PAGE_SHIFT);
u64 src_offset = node->vma[0].offset;
u64 dst_offset = node->vma[1].offset;
int src_tiled = !!node->memtype;
int dst_tiled = !!((struct nouveau_mem *)new_mem->mm_node)->memtype;
int dst_tiled = !!((struct nvkm_mem *)new_mem->mm_node)->memtype;
int ret;
while (length) {
@ -1036,25 +1036,25 @@ static int
nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
struct ttm_mem_reg *mem)
{
struct nouveau_mem *old_node = bo->mem.mm_node;
struct nouveau_mem *new_node = mem->mm_node;
struct nvkm_mem *old_node = bo->mem.mm_node;
struct nvkm_mem *new_node = mem->mm_node;
u64 size = (u64)mem->num_pages << PAGE_SHIFT;
int ret;
ret = nouveau_vm_get(drm->client.vm, size, old_node->page_shift,
NV_MEM_ACCESS_RW, &old_node->vma[0]);
ret = nvkm_vm_get(drm->client.vm, size, old_node->page_shift,
NV_MEM_ACCESS_RW, &old_node->vma[0]);
if (ret)
return ret;
ret = nouveau_vm_get(drm->client.vm, size, new_node->page_shift,
NV_MEM_ACCESS_RW, &old_node->vma[1]);
ret = nvkm_vm_get(drm->client.vm, size, new_node->page_shift,
NV_MEM_ACCESS_RW, &old_node->vma[1]);
if (ret) {
nouveau_vm_put(&old_node->vma[0]);
nvkm_vm_put(&old_node->vma[0]);
return ret;
}
nouveau_vm_map(&old_node->vma[0], old_node);
nouveau_vm_map(&old_node->vma[1], new_node);
nvkm_vm_map(&old_node->vma[0], old_node);
nvkm_vm_map(&old_node->vma[1], new_node);
return 0;
}
@ -1069,7 +1069,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
int ret;
/* create temporary vmas for the transfer and attach them to the
* old nouveau_mem node, these will get cleaned up after ttm has
* old nvkm_mem node, these will get cleaned up after ttm has
* destroyed the ttm_mem_reg
*/
if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
@ -1231,7 +1231,7 @@ static void
nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
{
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nouveau_vma *vma;
struct nvkm_vma *vma;
/* ttm can now (stupidly) pass the driver bos it didn't create... */
if (bo->destroy != nouveau_bo_del_ttm)
@ -1241,9 +1241,9 @@ nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
if (new_mem && new_mem->mem_type != TTM_PL_SYSTEM &&
(new_mem->mem_type == TTM_PL_VRAM ||
nvbo->page_shift != vma->vm->mmu->lpg_shift)) {
nouveau_vm_map(vma, new_mem->mm_node);
nvkm_vm_map(vma, new_mem->mm_node);
} else {
nouveau_vm_unmap(vma);
nvkm_vm_unmap(vma);
}
}
}
@ -1354,7 +1354,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
struct nouveau_drm *drm = nouveau_bdev(bdev);
struct nouveau_mem *node = mem->mm_node;
struct nvkm_mem *node = mem->mm_node;
int ret;
mem->bus.addr = NULL;
@ -1385,7 +1385,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
mem->bus.base = nv_device_resource_start(nvxx_device(&drm->device), 1);
mem->bus.is_iomem = true;
if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
struct nouveau_bar *bar = nvxx_bar(&drm->device);
struct nvkm_bar *bar = nvxx_bar(&drm->device);
ret = bar->umap(bar, node, NV_MEM_ACCESS_RW,
&node->bar_vma);
@ -1405,8 +1405,8 @@ static void
nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
{
struct nouveau_drm *drm = nouveau_bdev(bdev);
struct nouveau_bar *bar = nvxx_bar(&drm->device);
struct nouveau_mem *node = mem->mm_node;
struct nvkm_bar *bar = nvxx_bar(&drm->device);
struct nvkm_mem *node = mem->mm_node;
if (!node->bar_vma.node)
return;
@ -1465,7 +1465,7 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm)
{
struct ttm_dma_tt *ttm_dma = (void *)ttm;
struct nouveau_drm *drm;
struct nouveau_device *device;
struct nvkm_device *device;
struct drm_device *dev;
struct device *pdev;
unsigned i;
@ -1539,7 +1539,7 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
{
struct ttm_dma_tt *ttm_dma = (void *)ttm;
struct nouveau_drm *drm;
struct nouveau_device *device;
struct nvkm_device *device;
struct drm_device *dev;
struct device *pdev;
unsigned i;
@ -1613,10 +1613,10 @@ struct ttm_bo_driver nouveau_bo_driver = {
.io_mem_free = &nouveau_ttm_io_mem_free,
};
struct nouveau_vma *
nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
struct nvkm_vma *
nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nvkm_vm *vm)
{
struct nouveau_vma *vma;
struct nvkm_vma *vma;
list_for_each_entry(vma, &nvbo->vma_list, head) {
if (vma->vm == vm)
return vma;
@ -1626,13 +1626,13 @@ nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
}
int
nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
struct nouveau_vma *vma)
nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nvkm_vm *vm,
struct nvkm_vma *vma)
{
const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
int ret;
ret = nouveau_vm_get(vm, size, nvbo->page_shift,
ret = nvkm_vm_get(vm, size, nvbo->page_shift,
NV_MEM_ACCESS_RW, vma);
if (ret)
return ret;
@ -1640,7 +1640,7 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
if ( nvbo->bo.mem.mem_type != TTM_PL_SYSTEM &&
(nvbo->bo.mem.mem_type == TTM_PL_VRAM ||
nvbo->page_shift != vma->vm->mmu->lpg_shift))
nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
nvkm_vm_map(vma, nvbo->bo.mem.mm_node);
list_add_tail(&vma->head, &nvbo->vma_list);
vma->refcount = 1;
@ -1648,12 +1648,12 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
}
void
nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nvkm_vma *vma)
{
if (vma->node) {
if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM)
nouveau_vm_unmap(vma);
nouveau_vm_put(vma);
nvkm_vm_unmap(vma);
nvkm_vm_put(vma);
list_del(&vma->head);
}
}

12
drivers/gpu/drm/nouveau/nouveau_bo.h
View File

@ -5,7 +5,7 @@
struct nouveau_channel;
struct nouveau_fence;
struct nouveau_vma;
struct nvkm_vma;
struct nouveau_bo {
struct ttm_buffer_object bo;
@ -87,12 +87,12 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible,
void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo);
void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo);
struct nouveau_vma *
nouveau_bo_vma_find(struct nouveau_bo *, struct nouveau_vm *);
struct nvkm_vma *
nouveau_bo_vma_find(struct nouveau_bo *, struct nvkm_vm *);
int nouveau_bo_vma_add(struct nouveau_bo *, struct nouveau_vm *,
struct nouveau_vma *);
void nouveau_bo_vma_del(struct nouveau_bo *, struct nouveau_vma *);
int nouveau_bo_vma_add(struct nouveau_bo *, struct nvkm_vm *,
struct nvkm_vma *);
void nouveau_bo_vma_del(struct nouveau_bo *, struct nvkm_vma *);
/* TODO: submit equivalent to TTM generic API upstream? */
static inline void __iomem *

6
drivers/gpu/drm/nouveau/nouveau_chan.c
View File

@ -88,7 +88,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
u32 handle, u32 size, struct nouveau_channel **pchan)
{
struct nouveau_cli *cli = (void *)nvif_client(&device->base);
struct nouveau_mmu *mmu = nvxx_mmu(device);
struct nvkm_mmu *mmu = nvxx_mmu(device);
struct nv_dma_v0 args = {};
struct nouveau_channel *chan;
u32 target;
@ -281,8 +281,8 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
{
struct nvif_device *device = chan->device;
struct nouveau_cli *cli = (void *)nvif_client(&device->base);
struct nouveau_mmu *mmu = nvxx_mmu(device);
struct nouveau_sw_chan *swch;
struct nvkm_mmu *mmu = nvxx_mmu(device);
struct nvkm_sw_chan *swch;
struct nv_dma_v0 args = {};
int ret, i;

2
drivers/gpu/drm/nouveau/nouveau_chan.h
View File

@ -16,7 +16,7 @@ struct nouveau_channel {
struct {
struct nouveau_bo *buffer;
struct nouveau_vma vma;
struct nvkm_vma vma;
struct nvif_object ctxdma;
} push;

10
drivers/gpu/drm/nouveau/nouveau_connector.c
View File

@ -115,7 +115,7 @@ nouveau_connector_ddc_detect(struct drm_connector *connector)
struct drm_device *dev = connector->dev;
struct nouveau_connector *nv_connector = nouveau_connector(connector);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_gpio *gpio = nvxx_gpio(&drm->device);
struct nvkm_gpio *gpio = nvxx_gpio(&drm->device);
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
int i, panel = -ENODEV;
@ -241,7 +241,7 @@ nouveau_connector_detect(struct drm_connector *connector, bool force)
struct nouveau_connector *nv_connector = nouveau_connector(connector);
struct nouveau_encoder *nv_encoder = NULL;
struct nouveau_encoder *nv_partner;
struct nouveau_i2c_port *i2c;
struct nvkm_i2c_port *i2c;
int type;
int ret;
enum drm_connector_status conn_status = connector_status_disconnected;
@ -985,7 +985,7 @@ nouveau_connector_aux_xfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
struct nouveau_connector *nv_connector =
container_of(aux, typeof(*nv_connector), aux);
struct nouveau_encoder *nv_encoder;
struct nouveau_i2c_port *port;
struct nvkm_i2c_port *port;
int ret;
nv_encoder = find_encoder(&nv_connector->base, DCB_OUTPUT_DP);
@ -996,13 +996,13 @@ nouveau_connector_aux_xfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
if (msg->size == 0)
return msg->size;
ret = nouveau_i2c(port)->acquire(port, 0);
ret = nvkm_i2c(port)->acquire(port, 0);
if (ret)
return ret;
ret = port->func->aux(port, false, msg->request, msg->address,
msg->buffer, msg->size);
nouveau_i2c(port)->release(port);
nvkm_i2c(port)->release(port);
if (ret >= 0) {
msg->reply = ret;
return msg->size;

2
drivers/gpu/drm/nouveau/nouveau_connector.h
View File

@ -33,7 +33,7 @@
#include <drm/drm_dp_helper.h>
#include "nouveau_crtc.h"
struct nouveau_i2c_port;
struct nvkm_i2c_port;
enum nouveau_underscan_type {
UNDERSCAN_OFF,

2
drivers/gpu/drm/nouveau/nouveau_display.h
View File

@ -8,7 +8,7 @@
struct nouveau_framebuffer {
struct drm_framebuffer base;
struct nouveau_bo *nvbo;
struct nouveau_vma vma;
struct nvkm_vma vma;
u32 r_handle;
u32 r_format;
u32 r_pitch;

2
drivers/gpu/drm/nouveau/nouveau_dma.c
View File

@ -84,7 +84,7 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
{
struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base);
struct nouveau_bo *pb = chan->push.buffer;
struct nouveau_vma *vma;
struct nvkm_vma *vma;
int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
u64 offset;

4
drivers/gpu/drm/nouveau/nouveau_dp.c
View File

@ -31,7 +31,7 @@
#include "nouveau_crtc.h"
static void
nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch,
nouveau_dp_probe_oui(struct drm_device *dev, struct nvkm_i2c_port *auxch,
u8 *dpcd)
{
struct nouveau_drm *drm = nouveau_drm(dev);
@ -55,7 +55,7 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder)
{
struct drm_device *dev = nv_encoder->base.base.dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_i2c_port *auxch;
struct nvkm_i2c_port *auxch;
u8 *dpcd = nv_encoder->dp.dpcd;
int ret;

48
drivers/gpu/drm/nouveau/nouveau_drm.c
View File

@ -124,7 +124,7 @@ nouveau_cli_create(u64 name, const char *sname,
static void
nouveau_cli_destroy(struct nouveau_cli *cli)
{
nouveau_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
nvif_client_fini(&cli->base);
usif_client_fini(cli);
}
@ -134,7 +134,7 @@ nouveau_accel_fini(struct nouveau_drm *drm)
{
nouveau_channel_del(&drm->channel);
nvif_object_fini(&drm->ntfy);
nouveau_gpuobj_ref(NULL, &drm->notify);
nvkm_gpuobj_ref(NULL, &drm->notify);
nvif_object_fini(&drm->nvsw);
nouveau_channel_del(&drm->cechan);
nvif_object_fini(&drm->ttm.copy);
@ -231,7 +231,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
if (ret == 0) {
struct nouveau_sw_chan *swch;
struct nvkm_sw_chan *swch;
ret = RING_SPACE(drm->channel, 2);
if (ret == 0) {
if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
@ -255,8 +255,8 @@ nouveau_accel_init(struct nouveau_drm *drm)
}
if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
ret = nouveau_gpuobj_new(nvxx_object(&drm->device), NULL, 32,
0, 0, &drm->notify);
ret = nvkm_gpuobj_new(nvxx_object(&drm->device), NULL, 32,
0, 0, &drm->notify);
if (ret) {
NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
nouveau_accel_fini(drm);
@ -285,7 +285,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
static int nouveau_drm_probe(struct pci_dev *pdev,
const struct pci_device_id *pent)
{
struct nouveau_device *device;
struct nvkm_device *device;
struct apertures_struct *aper;
bool boot = false;
int ret;
@ -318,9 +318,9 @@ static int nouveau_drm_probe(struct pci_dev *pdev,
remove_conflicting_framebuffers(aper, "nouveaufb", boot);
kfree(aper);
ret = nouveau_device_create(pdev, NVKM_BUS_PCI,
nouveau_pci_name(pdev), pci_name(pdev),
nouveau_config, nouveau_debug, &device);
ret = nvkm_device_create(pdev, NVKM_BUS_PCI,
nouveau_pci_name(pdev), pci_name(pdev),
nouveau_config, nouveau_debug, &device);
if (ret)
return ret;
@ -328,7 +328,7 @@ static int nouveau_drm_probe(struct pci_dev *pdev,
ret = drm_get_pci_dev(pdev, pent, &driver_pci);
if (ret) {
nouveau_object_ref(NULL, (struct nouveau_object **)&device);
nvkm_object_ref(NULL, (struct nvkm_object **)&device);
return ret;
}
@ -380,7 +380,7 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
dev->dev_private = drm;
drm->dev = dev;
nvxx_client(&drm->client.base)->debug =
nouveau_dbgopt(nouveau_debug, "DRM");
nvkm_dbgopt(nouveau_debug, "DRM");
INIT_LIST_HEAD(&drm->clients);
spin_lock_init(&drm->tile.lock);
@ -435,8 +435,8 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
nouveau_agp_init(drm);
if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
ret = nouveau_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
0x1000, &drm->client.vm);
ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
0x1000, &drm->client.vm);
if (ret)
goto fail_device;
@ -523,16 +523,16 @@ void
nouveau_drm_device_remove(struct drm_device *dev)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_client *client;
struct nouveau_object *device;
struct nvkm_client *client;
struct nvkm_object *device;
dev->irq_enabled = false;
client = nvxx_client(&drm->client.base);
device = client->device;
drm_put_dev(dev);
nouveau_object_ref(NULL, &device);
nouveau_object_debug();
nvkm_object_ref(NULL, &device);
nvkm_object_debug();
}
static void
@ -831,8 +831,8 @@ nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
cli->base.super = false;
if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
ret = nouveau_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
0x1000, &cli->vm);
ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
0x1000, &cli->vm);
if (ret) {
nouveau_cli_destroy(cli);
goto out_suspend;
@ -1056,10 +1056,10 @@ nouveau_platform_device_create_(struct platform_device *pdev, int size,
struct drm_device *drm;
int err;
err = nouveau_device_create_(pdev, NVKM_BUS_PLATFORM,
nouveau_platform_name(pdev),
dev_name(&pdev->dev), nouveau_config,
nouveau_debug, size, pobject);
err = nvkm_device_create_(pdev, NVKM_BUS_PLATFORM,
nouveau_platform_name(pdev),
dev_name(&pdev->dev), nouveau_config,
nouveau_debug, size, pobject);
if (err)
return ERR_PTR(err);
@ -1079,7 +1079,7 @@ nouveau_platform_device_create_(struct platform_device *pdev, int size,
return drm;
err_free:
nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
nvkm_object_ref(NULL, (struct nvkm_object **)pobject);
return ERR_PTR(err);
}

4
drivers/gpu/drm/nouveau/nouveau_drm.h
View File

@ -80,7 +80,7 @@ enum nouveau_drm_handle {
struct nouveau_cli {
struct nvif_client base;
struct nouveau_vm *vm; /*XXX*/
struct nvkm_vm *vm; /*XXX*/
struct list_head head;
struct mutex mutex;
void *abi16;
@ -142,7 +142,7 @@ struct nouveau_drm {
/* context for accelerated drm-internal operations */
struct nouveau_channel *cechan;
struct nouveau_channel *channel;
struct nouveau_gpuobj *notify;
struct nvkm_gpuobj *notify;
struct nouveau_fbdev *fbcon;
struct nvif_object nvsw;
struct nvif_object ntfy;

4
drivers/gpu/drm/nouveau/nouveau_encoder.h
View File

@ -34,14 +34,14 @@
#define NV_DPMS_CLEARED 0x80
struct nouveau_i2c_port;
struct nvkm_i2c_port;
struct nouveau_encoder {
struct drm_encoder_slave base;
struct dcb_output *dcb;
int or;
struct nouveau_i2c_port *i2c;
struct nvkm_i2c_port *i2c;
/* different to drm_encoder.crtc, this reflects what's
* actually programmed on the hw, not the proposed crtc */

6
drivers/gpu/drm/nouveau/nouveau_fence.h
View File

@ -89,9 +89,9 @@ int nouveau_flip_complete(void *chan);
struct nv84_fence_chan {
struct nouveau_fence_chan base;
struct nouveau_vma vma;
struct nouveau_vma vma_gart;
struct nouveau_vma dispc_vma[4];
struct nvkm_vma vma;
struct nvkm_vma vma_gart;
struct nvkm_vma dispc_vma[4];
};
struct nv84_fence_priv {

20
drivers/gpu/drm/nouveau/nouveau_gem.c
View File

@ -64,7 +64,7 @@ nouveau_gem_object_open(struct drm_gem_object *gem, struct drm_file *file_priv)
struct nouveau_cli *cli = nouveau_cli(file_priv);
struct nouveau_bo *nvbo = nouveau_gem_object(gem);
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
struct nouveau_vma *vma;
struct nvkm_vma *vma;
struct device *dev = drm->dev->dev;
int ret;
@ -105,14 +105,14 @@ out:
static void
nouveau_gem_object_delete(void *data)
{
struct nouveau_vma *vma = data;
nouveau_vm_unmap(vma);
nouveau_vm_put(vma);
struct nvkm_vma *vma = data;
nvkm_vm_unmap(vma);
nvkm_vm_put(vma);
kfree(vma);
}
static void
nouveau_gem_object_unmap(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
nouveau_gem_object_unmap(struct nouveau_bo *nvbo, struct nvkm_vma *vma)
{
const bool mapped = nvbo->bo.mem.mem_type != TTM_PL_SYSTEM;
struct reservation_object *resv = nvbo->bo.resv;
@ -135,8 +135,8 @@ nouveau_gem_object_unmap(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
nouveau_fence_work(fence, nouveau_gem_object_delete, vma);
} else {
if (mapped)
nouveau_vm_unmap(vma);
nouveau_vm_put(vma);
nvkm_vm_unmap(vma);
nvkm_vm_put(vma);
kfree(vma);
}
}
@ -148,7 +148,7 @@ nouveau_gem_object_close(struct drm_gem_object *gem, struct drm_file *file_priv)
struct nouveau_bo *nvbo = nouveau_gem_object(gem);
struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
struct device *dev = drm->dev->dev;
struct nouveau_vma *vma;
struct nvkm_vma *vma;
int ret;
if (!cli->vm)
@ -222,7 +222,7 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem,
{
struct nouveau_cli *cli = nouveau_cli(file_priv);
struct nouveau_bo *nvbo = nouveau_gem_object(gem);
struct nouveau_vma *vma;
struct nvkm_vma *vma;
if (nvbo->bo.mem.mem_type == TTM_PL_TT)
rep->domain = NOUVEAU_GEM_DOMAIN_GART;
@ -251,7 +251,7 @@ nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_cli *cli = nouveau_cli(file_priv);
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
struct drm_nouveau_gem_new *req = data;
struct nouveau_bo *nvbo = NULL;
int ret = 0;

54
drivers/gpu/drm/nouveau/nouveau_hwmon.c
View File

@ -40,7 +40,7 @@ nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf)
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int temp = therm->temp_get(therm);
if (temp < 0)
@ -66,7 +66,7 @@ nouveau_hwmon_temp1_auto_point1_temp(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST) * 1000);
@ -78,7 +78,7 @@ nouveau_hwmon_set_temp1_auto_point1_temp(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -99,7 +99,7 @@ nouveau_hwmon_temp1_auto_point1_temp_hyst(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST) * 1000);
@ -111,7 +111,7 @@ nouveau_hwmon_set_temp1_auto_point1_temp_hyst(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -131,7 +131,7 @@ nouveau_hwmon_max_temp(struct device *d, struct device_attribute *a, char *buf)
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK) * 1000);
@ -142,7 +142,7 @@ nouveau_hwmon_set_max_temp(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -162,7 +162,7 @@ nouveau_hwmon_max_temp_hyst(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST) * 1000);
@ -173,7 +173,7 @@ nouveau_hwmon_set_max_temp_hyst(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -194,7 +194,7 @@ nouveau_hwmon_critical_temp(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_CRITICAL) * 1000);
@ -206,7 +206,7 @@ nouveau_hwmon_set_critical_temp(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -227,7 +227,7 @@ nouveau_hwmon_critical_temp_hyst(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_CRITICAL_HYST) * 1000);
@ -240,7 +240,7 @@ nouveau_hwmon_set_critical_temp_hyst(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -260,7 +260,7 @@ nouveau_hwmon_emergency_temp(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN) * 1000);
@ -272,7 +272,7 @@ nouveau_hwmon_set_emergency_temp(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -293,7 +293,7 @@ nouveau_hwmon_emergency_temp_hyst(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST) * 1000);
@ -306,7 +306,7 @@ nouveau_hwmon_set_emergency_temp_hyst(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
if (kstrtol(buf, 10, &value) == -EINVAL)
@ -346,7 +346,7 @@ nouveau_hwmon_show_fan1_input(struct device *d, struct device_attribute *attr,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
return snprintf(buf, PAGE_SIZE, "%d\n", therm->fan_sense(therm));
}
@ -359,7 +359,7 @@ nouveau_hwmon_get_pwm1_enable(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int ret;
ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MODE);
@ -375,7 +375,7 @@ nouveau_hwmon_set_pwm1_enable(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
int ret;
@ -398,7 +398,7 @@ nouveau_hwmon_get_pwm1(struct device *d, struct device_attribute *a, char *buf)
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int ret;
ret = therm->fan_get(therm);
@ -414,7 +414,7 @@ nouveau_hwmon_set_pwm1(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int ret = -ENODEV;
long value;
@ -438,7 +438,7 @@ nouveau_hwmon_get_pwm1_min(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int ret;
ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MIN_DUTY);
@ -454,7 +454,7 @@ nouveau_hwmon_set_pwm1_min(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
int ret;
@ -478,7 +478,7 @@ nouveau_hwmon_get_pwm1_max(struct device *d,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
int ret;
ret = therm->attr_get(therm, NVKM_THERM_ATTR_FAN_MAX_DUTY);
@ -494,7 +494,7 @@ nouveau_hwmon_set_pwm1_max(struct device *d, struct device_attribute *a,
{
struct drm_device *dev = dev_get_drvdata(d);
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
long value;
int ret;
@ -561,7 +561,7 @@ nouveau_hwmon_init(struct drm_device *dev)
{
#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_therm *therm = nvxx_therm(&drm->device);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
struct nouveau_hwmon *hwmon;
struct device *hwmon_dev;
int ret = 0;

14
drivers/gpu/drm/nouveau/nouveau_nvif.c
View File

@ -60,22 +60,22 @@ nvkm_client_ioctl(void *priv, bool super, void *data, u32 size, void **hack)
static int
nvkm_client_resume(void *priv)
{
return nouveau_client_init(priv);
return nvkm_client_init(priv);
}
static int
nvkm_client_suspend(void *priv)
{
return nouveau_client_fini(priv, true);
return nvkm_client_fini(priv, true);
}
static void
nvkm_client_driver_fini(void *priv)
{
struct nouveau_object *client = priv;
nouveau_client_fini(nv_client(client), false);
struct nvkm_object *client = priv;
nvkm_client_fini(nv_client(client), false);
atomic_set(&client->refcount, 1);
nouveau_object_ref(NULL, &client);
nvkm_object_ref(NULL, &client);
}
static int
@ -110,10 +110,10 @@ static int
nvkm_client_driver_init(const char *name, u64 device, const char *cfg,
const char *dbg, void **ppriv)
{
struct nouveau_client *client;
struct nvkm_client *client;
int ret;
ret = nouveau_client_create(name, device, cfg, dbg, &client);
ret = nvkm_client_create(name, device, cfg, dbg, &client);
*ppriv = client;
if (ret)
return ret;

2
drivers/gpu/drm/nouveau/nouveau_platform.c
View File

@ -152,7 +152,7 @@ static int nouveau_platform_remove(struct platform_device *pdev)
{
struct drm_device *drm_dev = platform_get_drvdata(pdev);
struct nouveau_drm *drm = nouveau_drm(drm_dev);
struct nouveau_device *device = nvxx_device(&drm->device);
struct nvkm_device *device = nvxx_device(&drm->device);
struct nouveau_platform_gpu *gpu = nv_device_to_platform(device)->gpu;
nouveau_drm_device_remove(drm_dev);

2
drivers/gpu/drm/nouveau/nouveau_platform.h
View File

@ -39,7 +39,7 @@ struct nouveau_platform_gpu {
};
struct nouveau_platform_device {
struct nouveau_device device;
struct nvkm_device device;
struct nouveau_platform_gpu *gpu;

10
drivers/gpu/drm/nouveau/nouveau_sgdma.c
View File

@ -9,7 +9,7 @@ struct nouveau_sgdma_be {
* nouve_bo.c works properly, otherwise have to move them here
*/
struct ttm_dma_tt ttm;
struct nouveau_mem *node;
struct nvkm_mem *node;
};
static void
@ -27,7 +27,7 @@ static int
nv04_sgdma_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
{
struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)ttm;
struct nouveau_mem *node = mem->mm_node;
struct nvkm_mem *node = mem->mm_node;
if (ttm->sg) {
node->sg = ttm->sg;
@ -38,7 +38,7 @@ nv04_sgdma_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
}
node->size = (mem->num_pages << PAGE_SHIFT) >> 12;
nouveau_vm_map(&node->vma[0], node);
nvkm_vm_map(&node->vma[0], node);
nvbe->node = node;
return 0;
}
@ -47,7 +47,7 @@ static int
nv04_sgdma_unbind(struct ttm_tt *ttm)
{
struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)ttm;
nouveau_vm_unmap(&nvbe->node->vma[0]);
nvkm_vm_unmap(&nvbe->node->vma[0]);
return 0;
}
@ -61,7 +61,7 @@ static int
nv50_sgdma_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
{
struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)ttm;
struct nouveau_mem *node = mem->mm_node;
struct nvkm_mem *node = mem->mm_node;
/* noop: bound in move_notify() */
if (ttm->sg) {

52
drivers/gpu/drm/nouveau/nouveau_ttm.c
View File

@ -33,7 +33,7 @@ static int
nouveau_vram_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
{
struct nouveau_drm *drm = nouveau_bdev(man->bdev);
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
man->priv = pfb;
return 0;
}
@ -46,16 +46,16 @@ nouveau_vram_manager_fini(struct ttm_mem_type_manager *man)
}
static inline void
nouveau_mem_node_cleanup(struct nouveau_mem *node)
nvkm_mem_node_cleanup(struct nvkm_mem *node)
{
if (node->vma[0].node) {
nouveau_vm_unmap(&node->vma[0]);
nouveau_vm_put(&node->vma[0]);
nvkm_vm_unmap(&node->vma[0]);
nvkm_vm_put(&node->vma[0]);
}
if (node->vma[1].node) {
nouveau_vm_unmap(&node->vma[1]);
nouveau_vm_put(&node->vma[1]);
nvkm_vm_unmap(&node->vma[1]);
nvkm_vm_put(&node->vma[1]);
}
}
@ -64,9 +64,9 @@ nouveau_vram_manager_del(struct ttm_mem_type_manager *man,
struct ttm_mem_reg *mem)
{
struct nouveau_drm *drm = nouveau_bdev(man->bdev);
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
nouveau_mem_node_cleanup(mem->mm_node);
pfb->ram->put(pfb, (struct nouveau_mem **)&mem->mm_node);
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
nvkm_mem_node_cleanup(mem->mm_node);
pfb->ram->put(pfb, (struct nvkm_mem **)&mem->mm_node);
}
static int
@ -76,9 +76,9 @@ nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
struct ttm_mem_reg *mem)
{
struct nouveau_drm *drm = nouveau_bdev(man->bdev);
struct nouveau_fb *pfb = nvxx_fb(&drm->device);
struct nvkm_fb *pfb = nvxx_fb(&drm->device);
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nouveau_mem *node;
struct nvkm_mem *node;
u32 size_nc = 0;
int ret;
@ -103,9 +103,9 @@ nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
static void
nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
{
struct nouveau_fb *pfb = man->priv;
struct nouveau_mm *mm = &pfb->vram;
struct nouveau_mm_node *r;
struct nvkm_fb *pfb = man->priv;
struct nvkm_mm *mm = &pfb->vram;
struct nvkm_mm_node *r;
u32 total = 0, free = 0;
mutex_lock(&nv_subdev(pfb)->mutex);
@ -150,7 +150,7 @@ static void
nouveau_gart_manager_del(struct ttm_mem_type_manager *man,
struct ttm_mem_reg *mem)
{
nouveau_mem_node_cleanup(mem->mm_node);
nvkm_mem_node_cleanup(mem->mm_node);
kfree(mem->mm_node);
mem->mm_node = NULL;
}
@ -163,7 +163,7 @@ nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
{
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nouveau_mem *node;
struct nvkm_mem *node;
node = kzalloc(sizeof(*node), GFP_KERNEL);
if (!node)
@ -208,10 +208,10 @@ static int
nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
{
struct nouveau_drm *drm = nouveau_bdev(man->bdev);
struct nouveau_mmu *mmu = nvxx_mmu(&drm->device);
struct nvkm_mmu *mmu = nvxx_mmu(&drm->device);
struct nv04_mmu_priv *priv = (void *)mmu;
struct nouveau_vm *vm = NULL;
nouveau_vm_ref(priv->vm, &vm, NULL);
struct nvkm_vm *vm = NULL;
nvkm_vm_ref(priv->vm, &vm, NULL);
man->priv = vm;
return 0;
}
@ -219,8 +219,8 @@ nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
static int
nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
{
struct nouveau_vm *vm = man->priv;
nouveau_vm_ref(NULL, &vm, NULL);
struct nvkm_vm *vm = man->priv;
nvkm_vm_ref(NULL, &vm, NULL);
man->priv = NULL;
return 0;
}
@ -228,9 +228,9 @@ nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
static void
nv04_gart_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *mem)
{
struct nouveau_mem *node = mem->mm_node;
struct nvkm_mem *node = mem->mm_node;
if (node->vma[0].node)
nouveau_vm_put(&node->vma[0]);
nvkm_vm_put(&node->vma[0]);
kfree(mem->mm_node);
mem->mm_node = NULL;
}
@ -241,7 +241,7 @@ nv04_gart_manager_new(struct ttm_mem_type_manager *man,
const struct ttm_place *place,
struct ttm_mem_reg *mem)
{
struct nouveau_mem *node;
struct nvkm_mem *node;
int ret;
node = kzalloc(sizeof(*node), GFP_KERNEL);
@ -250,8 +250,8 @@ nv04_gart_manager_new(struct ttm_mem_type_manager *man,
node->page_shift = 12;
ret = nouveau_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
NV_MEM_ACCESS_RW, &node->vma[0]);
ret = nvkm_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
NV_MEM_ACCESS_RW, &node->vma[0]);
if (ret) {
kfree(node);
return ret;

2
drivers/gpu/drm/nouveau/nv04_fence.c
View File

@ -57,7 +57,7 @@ nv04_fence_sync(struct nouveau_fence *fence,
static u32
nv04_fence_read(struct nouveau_channel *chan)
{
struct nouveau_fifo_chan *fifo = nvxx_fifo_chan(chan);;
struct nvkm_fifo_chan *fifo = nvxx_fifo_chan(chan);;
return atomic_read(&fifo->refcnt);
}

8
drivers/gpu/drm/nouveau/nv50_display.c
View File

@ -1677,7 +1677,7 @@ static int
nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe)
{
struct nouveau_drm *drm = nouveau_drm(connector->dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
int type = DRM_MODE_ENCODER_DAC;
@ -2062,7 +2062,7 @@ static int
nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
{
struct nouveau_drm *drm = nouveau_drm(connector->dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
int type;
@ -2233,8 +2233,8 @@ static int
nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
{
struct nouveau_drm *drm = nouveau_drm(connector->dev);
struct nouveau_i2c *i2c = nvxx_i2c(&drm->device);
struct nouveau_i2c_port *ddc = NULL;
struct nvkm_i2c *i2c = nvxx_i2c(&drm->device);
struct nvkm_i2c_port *ddc = NULL;
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
int type;

2
drivers/gpu/drm/nouveau/nv84_fence.c
View File

@ -213,7 +213,7 @@ nv84_fence_destroy(struct nouveau_drm *drm)
int
nv84_fence_create(struct nouveau_drm *drm)
{
struct nouveau_fifo *pfifo = nvxx_fifo(&drm->device);
struct nvkm_fifo *pfifo = nvxx_fifo(&drm->device);
struct nv84_fence_priv *priv;
int ret;

55
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c
View File

@ -21,18 +21,16 @@
*
* Authors: Ben Skeggs
*/
#include <core/option.h>
#include <subdev/i2c.h>
#include <subdev/mxm.h>
#include <subdev/bios.h>
#include <subdev/bios/mxm.h>
#include "mxms.h"
#include <core/device.h>
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/mxm.h>
#include <subdev/i2c.h>
static bool
mxm_shadow_rom_fetch(struct nouveau_i2c_port *i2c, u8 addr,
mxm_shadow_rom_fetch(struct nvkm_i2c_port *i2c, u8 addr,
u8 offset, u8 size, u8 *data)
{
struct i2c_msg msgs[] = {
@ -44,11 +42,11 @@ mxm_shadow_rom_fetch(struct nouveau_i2c_port *i2c, u8 addr,
}
static bool
mxm_shadow_rom(struct nouveau_mxm *mxm, u8 version)
mxm_shadow_rom(struct nvkm_mxm *mxm, u8 version)
{
struct nouveau_bios *bios = nouveau_bios(mxm);
struct nouveau_i2c *i2c = nouveau_i2c(mxm);
struct nouveau_i2c_port *port = NULL;
struct nvkm_bios *bios = nvkm_bios(mxm);
struct nvkm_i2c *i2c = nvkm_i2c(mxm);
struct nvkm_i2c_port *port = NULL;
u8 i2cidx, mxms[6], addr, size;
i2cidx = mxm_ddc_map(bios, 1 /* LVDS_DDC */) & 0x0f;
@ -79,9 +77,9 @@ mxm_shadow_rom(struct nouveau_mxm *mxm, u8 version)
#if defined(CONFIG_ACPI)
static bool
mxm_shadow_dsm(struct nouveau_mxm *mxm, u8 version)
mxm_shadow_dsm(struct nvkm_mxm *mxm, u8 version)
{
struct nouveau_device *device = nv_device(mxm);
struct nvkm_device *device = nv_device(mxm);
static char muid[] = {
0x00, 0xA4, 0x04, 0x40, 0x7D, 0x91, 0xF2, 0x4C,
0xB8, 0x9C, 0x79, 0xB6, 0x2F, 0xD5, 0x56, 0x65
@ -129,7 +127,7 @@ mxm_shadow_dsm(struct nouveau_mxm *mxm, u8 version)
#define WMI_WMMX_GUID "F6CB5C3C-9CAE-4EBD-B577-931EA32A2CC0"
static u8
wmi_wmmx_mxmi(struct nouveau_mxm *mxm, u8 version)
wmi_wmmx_mxmi(struct nvkm_mxm *mxm, u8 version)
{
u32 mxmi_args[] = { 0x494D584D /* MXMI */, version, 0 };
struct acpi_buffer args = { sizeof(mxmi_args), mxmi_args };
@ -158,7 +156,7 @@ wmi_wmmx_mxmi(struct nouveau_mxm *mxm, u8 version)
}
static bool
mxm_shadow_wmi(struct nouveau_mxm *mxm, u8 version)
mxm_shadow_wmi(struct nvkm_mxm *mxm, u8 version)
{
u32 mxms_args[] = { 0x534D584D /* MXMS */, version, 0 };
struct acpi_buffer args = { sizeof(mxms_args), mxms_args };
@ -186,7 +184,7 @@ mxm_shadow_wmi(struct nouveau_mxm *mxm, u8 version)
obj = retn.pointer;
if (obj->type == ACPI_TYPE_BUFFER) {
mxm->mxms = kmemdup(obj->buffer.pointer,
obj->buffer.length, GFP_KERNEL);
obj->buffer.length, GFP_KERNEL);
}
kfree(obj);
@ -196,7 +194,7 @@ mxm_shadow_wmi(struct nouveau_mxm *mxm, u8 version)
static struct mxm_shadow_h {
const char *name;
bool (*exec)(struct nouveau_mxm *, u8 version);
bool (*exec)(struct nvkm_mxm *, u8 version);
} _mxm_shadow[] = {
{ "ROM", mxm_shadow_rom },
#if defined(CONFIG_ACPI)
@ -209,7 +207,7 @@ static struct mxm_shadow_h {
};
static int
mxm_shadow(struct nouveau_mxm *mxm, u8 version)
mxm_shadow(struct nvkm_mxm *mxm, u8 version)
{
struct mxm_shadow_h *shadow = _mxm_shadow;
do {
@ -225,19 +223,18 @@ mxm_shadow(struct nouveau_mxm *mxm, u8 version)
}
int
nouveau_mxm_create_(struct nouveau_object *parent,
struct nouveau_object *engine,
struct nouveau_oclass *oclass, int length, void **pobject)
nvkm_mxm_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, int length, void **pobject)
{
struct nouveau_device *device = nv_device(parent);
struct nouveau_bios *bios = nouveau_bios(device);
struct nouveau_mxm *mxm;
struct nvkm_device *device = nv_device(parent);
struct nvkm_bios *bios = nvkm_bios(device);
struct nvkm_mxm *mxm;
u8 ver, len;
u16 data;
int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "MXM", "mxm",
length, pobject);
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "MXM", "mxm",
length, pobject);
mxm = *pobject;
if (ret)
return ret;
@ -268,7 +265,7 @@ nouveau_mxm_create_(struct nouveau_object *parent,
mxms_version(mxm) >> 8, mxms_version(mxm) & 0xff);
mxms_foreach(mxm, 0, NULL, NULL);
if (nouveau_boolopt(device->cfgopt, "NvMXMDCB", true))
if (nvkm_boolopt(device->cfgopt, "NvMXMDCB", true))
mxm->action |= MXM_SANITISE_DCB;
return 0;
}

20
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c
View File

@ -21,22 +21,20 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/mxm.h>
#include "mxms.h"
#define ROM16(x) le16_to_cpu(*(u16 *)&(x))
#define ROM32(x) le32_to_cpu(*(u32 *)&(x))
static u8 *
mxms_data(struct nouveau_mxm *mxm)
mxms_data(struct nvkm_mxm *mxm)
{
return mxm->mxms;
}
u16
mxms_version(struct nouveau_mxm *mxm)
mxms_version(struct nvkm_mxm *mxm)
{
u8 *mxms = mxms_data(mxm);
u16 version = (mxms[4] << 8) | mxms[5];
@ -54,19 +52,19 @@ mxms_version(struct nouveau_mxm *mxm)
}
u16
mxms_headerlen(struct nouveau_mxm *mxm)
mxms_headerlen(struct nvkm_mxm *mxm)
{
return 8;
}
u16
mxms_structlen(struct nouveau_mxm *mxm)
mxms_structlen(struct nvkm_mxm *mxm)
{
return *(u16 *)&mxms_data(mxm)[6];
}
bool
mxms_checksum(struct nouveau_mxm *mxm)
mxms_checksum(struct nvkm_mxm *mxm)
{
u16 size = mxms_headerlen(mxm) + mxms_structlen(mxm);
u8 *mxms = mxms_data(mxm), sum = 0;
@ -80,7 +78,7 @@ mxms_checksum(struct nouveau_mxm *mxm)
}
bool
mxms_valid(struct nouveau_mxm *mxm)
mxms_valid(struct nvkm_mxm *mxm)
{
u8 *mxms = mxms_data(mxm);
if (*(u32 *)mxms != 0x5f4d584d) {
@ -95,8 +93,8 @@ mxms_valid(struct nouveau_mxm *mxm)
}
bool
mxms_foreach(struct nouveau_mxm *mxm, u8 types,
bool (*exec)(struct nouveau_mxm *, u8 *, void *), void *info)
mxms_foreach(struct nvkm_mxm *mxm, u8 types,
bool (*exec)(struct nvkm_mxm *, u8 *, void *), void *info)
{
u8 *mxms = mxms_data(mxm);
u8 *desc = mxms + mxms_headerlen(mxm);
@ -180,7 +178,7 @@ mxms_foreach(struct nouveau_mxm *mxm, u8 types,
}
void
mxms_output_device(struct nouveau_mxm *mxm, u8 *pdata, struct mxms_odev *desc)
mxms_output_device(struct nvkm_mxm *mxm, u8 *pdata, struct mxms_odev *desc)
{
u64 data = ROM32(pdata[0]);
if (mxms_version(mxm) >= 0x0300)

18
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.h
View File

@ -1,5 +1,6 @@
#ifndef __NVMXM_MXMS_H__
#define __NVMXM_MXMS_H__
#include <subdev/mxm.h>
struct mxms_odev {
u8 outp_type;
@ -8,15 +9,14 @@ struct mxms_odev {
u8 dig_conn;
};
void mxms_output_device(struct nouveau_mxm *, u8 *, struct mxms_odev *);
void mxms_output_device(struct nvkm_mxm *, u8 *, struct mxms_odev *);
u16 mxms_version(struct nouveau_mxm *);
u16 mxms_headerlen(struct nouveau_mxm *);
u16 mxms_structlen(struct nouveau_mxm *);
bool mxms_checksum(struct nouveau_mxm *);
bool mxms_valid(struct nouveau_mxm *);
bool mxms_foreach(struct nouveau_mxm *, u8,
bool (*)(struct nouveau_mxm *, u8 *, void *), void *);
u16 mxms_version(struct nvkm_mxm *);
u16 mxms_headerlen(struct nvkm_mxm *);
u16 mxms_structlen(struct nvkm_mxm *);
bool mxms_checksum(struct nvkm_mxm *);
bool mxms_valid(struct nvkm_mxm *);
bool mxms_foreach(struct nvkm_mxm *, u8,
bool (*)(struct nvkm_mxm *, u8 *, void *), void *);
#endif

40
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c
View File

@ -21,17 +21,15 @@
*
* Authors: Ben Skeggs
*/
#include "mxms.h"
#include <subdev/mxm.h>
#include <subdev/bios.h>
#include <subdev/bios/conn.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/mxm.h>
#include "mxms.h"
struct nv50_mxm_priv {
struct nouveau_mxm base;
struct nvkm_mxm base;
};
struct context {
@ -40,7 +38,7 @@ struct context {
};
static bool
mxm_match_tmds_partner(struct nouveau_mxm *mxm, u8 *data, void *info)
mxm_match_tmds_partner(struct nvkm_mxm *mxm, u8 *data, void *info)
{
struct context *ctx = info;
struct mxms_odev desc;
@ -53,9 +51,9 @@ mxm_match_tmds_partner(struct nouveau_mxm *mxm, u8 *data, void *info)
}
static bool
mxm_match_dcb(struct nouveau_mxm *mxm, u8 *data, void *info)
mxm_match_dcb(struct nvkm_mxm *mxm, u8 *data, void *info)
{
struct nouveau_bios *bios = nouveau_bios(mxm);
struct nvkm_bios *bios = nvkm_bios(mxm);
struct context *ctx = info;
u64 desc = *(u64 *)data;
@ -98,9 +96,9 @@ mxm_match_dcb(struct nouveau_mxm *mxm, u8 *data, void *info)
}
static int
mxm_dcb_sanitise_entry(struct nouveau_bios *bios, void *data, int idx, u16 pdcb)
mxm_dcb_sanitise_entry(struct nvkm_bios *bios, void *data, int idx, u16 pdcb)
{
struct nouveau_mxm *mxm = data;
struct nvkm_mxm *mxm = data;
struct context ctx = { .outp = (u32 *)(bios->data + pdcb) };
u8 type, i2cidx, link, ver, len;
u8 *conn;
@ -180,7 +178,7 @@ mxm_dcb_sanitise_entry(struct nouveau_bios *bios, void *data, int idx, u16 pdcb)
}
static bool
mxm_show_unmatched(struct nouveau_mxm *mxm, u8 *data, void *info)
mxm_show_unmatched(struct nvkm_mxm *mxm, u8 *data, void *info)
{
u64 desc = *(u64 *)data;
if ((desc & 0xf0) != 0xf0)
@ -189,9 +187,9 @@ mxm_show_unmatched(struct nouveau_mxm *mxm, u8 *data, void *info)
}
static void
mxm_dcb_sanitise(struct nouveau_mxm *mxm)
mxm_dcb_sanitise(struct nvkm_mxm *mxm)
{
struct nouveau_bios *bios = nouveau_bios(mxm);
struct nvkm_bios *bios = nvkm_bios(mxm);
u8 ver, hdr, cnt, len;
u16 dcb = dcb_table(bios, &ver, &hdr, &cnt, &len);
if (dcb == 0x0000 || ver != 0x40) {
@ -204,14 +202,14 @@ mxm_dcb_sanitise(struct nouveau_mxm *mxm)
}
static int
nv50_mxm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
nv50_mxm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nv50_mxm_priv *priv;
int ret;
ret = nouveau_mxm_create(parent, engine, oclass, &priv);
ret = nvkm_mxm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
@ -221,13 +219,13 @@ nv50_mxm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0;
}
struct nouveau_oclass
struct nvkm_oclass
nv50_mxm_oclass = {
.handle = NV_SUBDEV(MXM, 0x50),
.ofuncs = &(struct nouveau_ofuncs) {
.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_mxm_ctor,
.dtor = _nouveau_mxm_dtor,
.init = _nouveau_mxm_init,
.fini = _nouveau_mxm_fini,
.dtor = _nvkm_mxm_dtor,
.init = _nvkm_mxm_init,
.fini = _nvkm_mxm_fini,
},
};