drm/radeon: fix fence value access
It is possible that radeon_fence_process is called after writeback is disabled for suspend, leading to an invalid read of register 0x0. This fixes a problem for me where the fence value is temporary incremented by 0x100000000 on suspend/resume. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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@ -42,21 +42,23 @@
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static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
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{
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if (rdev->wb.enabled) {
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*rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
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struct radeon_fence_driver *drv = &rdev->fence_drv[ring];
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if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
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*drv->cpu_addr = cpu_to_le32(seq);
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} else {
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WREG32(rdev->fence_drv[ring].scratch_reg, seq);
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WREG32(drv->scratch_reg, seq);
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}
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}
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static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
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{
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struct radeon_fence_driver *drv = &rdev->fence_drv[ring];
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u32 seq = 0;
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if (rdev->wb.enabled) {
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seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
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if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
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seq = le32_to_cpu(*drv->cpu_addr);
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} else {
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seq = RREG32(rdev->fence_drv[ring].scratch_reg);
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seq = RREG32(drv->scratch_reg);
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}
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return seq;
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}
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