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arm64: spinlock: fix ll/sc unlock on big-endian systems 

When unlocking a spinlock, we perform a read-modify-write on the owner
ticket in order to increment it and store it back with release
semantics.

In the LL/SC case, we load the 16-bit ticket using a 32-bit load and
therefore store back the wrong halfword on a big-endian system,
corrupting the lock after the first unlock and killing the system dead.

This patch fixes the unlock code to use 16-bit accessors consistently.

Signed-off-by: Will Deacon <will.deacon@arm.com>
hifive-unleashed-5.1
Will Deacon 2015-07-28 14:48:00 +01:00
parent 4150e50bf5
commit c1d7cd228b
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/include/asm/spinlock.h
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@ -110,7 +110,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
asm volatile(ARM64_LSE_ATOMIC_INSN(
/* LL/SC */
" ldr %w1, %0\n"
" ldrh %w1, %0\n"
" add %w1, %w1, #1\n"
" stlrh %w1, %0",
/* LSE atomics */