x86: mce: Rename CONFIG_X86_NEW_MCE to CONFIG_X86_MCE
Drop the CONFIG_X86_NEW_MCE symbol and change all references to it to check for CONFIG_X86_MCE directly. No code changes Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>hifive-unleashed-5.1
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5bb38adcb5
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c1ebf83561
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@ -781,15 +781,10 @@ config X86_MCE
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The action the kernel takes depends on the severity of the problem,
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The action the kernel takes depends on the severity of the problem,
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ranging from warning messages to halting the machine.
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ranging from warning messages to halting the machine.
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config X86_NEW_MCE
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depends on X86_MCE
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bool
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default y
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config X86_MCE_INTEL
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config X86_MCE_INTEL
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def_bool y
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def_bool y
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prompt "Intel MCE features"
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prompt "Intel MCE features"
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depends on X86_NEW_MCE && X86_LOCAL_APIC
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depends on X86_MCE && X86_LOCAL_APIC
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---help---
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---help---
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Additional support for intel specific MCE features such as
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Additional support for intel specific MCE features such as
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the thermal monitor.
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the thermal monitor.
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@ -797,7 +792,7 @@ config X86_MCE_INTEL
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config X86_MCE_AMD
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config X86_MCE_AMD
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def_bool y
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def_bool y
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prompt "AMD MCE features"
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prompt "AMD MCE features"
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depends on X86_NEW_MCE && X86_LOCAL_APIC
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depends on X86_MCE && X86_LOCAL_APIC
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---help---
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---help---
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Additional support for AMD specific MCE features such as
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Additional support for AMD specific MCE features such as
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the DRAM Error Threshold.
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the DRAM Error Threshold.
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@ -817,7 +812,7 @@ config X86_MCE_THRESHOLD
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default y
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default y
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config X86_MCE_INJECT
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config X86_MCE_INJECT
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depends on X86_NEW_MCE
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depends on X86_MCE
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tristate "Machine check injector support"
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tristate "Machine check injector support"
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---help---
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---help---
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Provide support for injecting machine checks for testing purposes.
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Provide support for injecting machine checks for testing purposes.
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@ -61,7 +61,7 @@ BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
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BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
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BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
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#endif
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#endif
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#ifdef CONFIG_X86_NEW_MCE
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#ifdef CONFIG_X86_MCE
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BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)
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BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)
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#endif
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#endif
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@ -66,7 +66,7 @@ static inline unsigned int get_nmi_count(int cpu)
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static inline int mce_in_progress(void)
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static inline int mce_in_progress(void)
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{
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{
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#if defined(CONFIG_X86_NEW_MCE)
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#if defined(CONFIG_X86_MCE)
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return atomic_read(&mce_entry) > 0;
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return atomic_read(&mce_entry) > 0;
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#endif
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#endif
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return 0;
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return 0;
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@ -1,6 +1,5 @@
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obj-y = mce.o
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obj-y = mce.o mce-severity.o
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obj-$(CONFIG_X86_NEW_MCE) += mce-severity.o
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obj-$(CONFIG_X86_ANCIENT_MCE) += winchip.o p5.o
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obj-$(CONFIG_X86_ANCIENT_MCE) += winchip.o p5.o
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obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
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obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
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obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o
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obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o
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@ -104,7 +104,7 @@ static int show_other_interrupts(struct seq_file *p, int prec)
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seq_printf(p, " Threshold APIC interrupts\n");
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seq_printf(p, " Threshold APIC interrupts\n");
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_X86_NEW_MCE
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#ifdef CONFIG_X86_MCE
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seq_printf(p, "%*s: ", prec, "MCE");
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seq_printf(p, "%*s: ", prec, "MCE");
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for_each_online_cpu(j)
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
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seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
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@ -200,7 +200,7 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
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sum += irq_stats(cpu)->irq_threshold_count;
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sum += irq_stats(cpu)->irq_threshold_count;
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_X86_NEW_MCE
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#ifdef CONFIG_X86_MCE
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sum += per_cpu(mce_exception_count, cpu);
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sum += per_cpu(mce_exception_count, cpu);
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sum += per_cpu(mce_poll_count, cpu);
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sum += per_cpu(mce_poll_count, cpu);
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#endif
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#endif
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@ -190,7 +190,7 @@ static void __init apic_intr_init(void)
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#ifdef CONFIG_X86_THRESHOLD
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#ifdef CONFIG_X86_THRESHOLD
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alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
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alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
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#endif
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#endif
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#if defined(CONFIG_X86_NEW_MCE) && defined(CONFIG_X86_LOCAL_APIC)
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#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_LOCAL_APIC)
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alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
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alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
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#endif
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#endif
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@ -856,7 +856,7 @@ static void do_signal(struct pt_regs *regs)
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void
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void
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do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
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do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
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{
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{
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#ifdef CONFIG_X86_NEW_MCE
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#ifdef CONFIG_X86_MCE
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/* notify userspace of pending MCEs */
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/* notify userspace of pending MCEs */
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if (thread_info_flags & _TIF_MCE_NOTIFY)
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if (thread_info_flags & _TIF_MCE_NOTIFY)
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mce_notify_process();
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mce_notify_process();
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