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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Thomas Gleixner:
 "A set of fixes for x86:

   - Fix the inconsistent error handling in the umwait init code

   - Rework the boot param zeroing so gcc9 stops complaining about out
     of bound memset. The resulting source code is actually more sane to
     read than the smart solution we had

   - Maintainers update so Tony gets involved when Intel models are
     added

   - Some more fallthrough fixes"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/boot: Save fields explicitly, zero out everything else
  MAINTAINERS, x86/CPU: Tony Luck will maintain asm/intel-family.h
  x86/fpu/math-emu: Address fallthrough warnings
  x86/apic/32: Fix yet another implicit fallthrough warning
  x86/umwait: Fix error handling in umwait_init()
alistair/sunxi64-5.4-dsi
Linus Torvalds 2019-08-18 09:45:42 -07:00
commit c332f3a70e
6 changed files with 99 additions and 20 deletions

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@ -8072,6 +8072,13 @@ T: git git://git.code.sf.net/p/intel-sas/isci
S: Supported S: Supported
F: drivers/scsi/isci/ F: drivers/scsi/isci/
INTEL CPU family model numbers
M: Tony Luck <tony.luck@intel.com>
M: x86@kernel.org
L: linux-kernel@vger.kernel.org
S: Supported
F: arch/x86/include/asm/intel-family.h
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets) INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
M: Jani Nikula <jani.nikula@linux.intel.com> M: Jani Nikula <jani.nikula@linux.intel.com>
M: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> M: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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@ -18,6 +18,20 @@
* Note: efi_info is commonly left uninitialized, but that field has a * Note: efi_info is commonly left uninitialized, but that field has a
* private magic, so it is better to leave it unchanged. * private magic, so it is better to leave it unchanged.
*/ */
#define sizeof_mbr(type, member) ({ sizeof(((type *)0)->member); })
#define BOOT_PARAM_PRESERVE(struct_member) \
{ \
.start = offsetof(struct boot_params, struct_member), \
.len = sizeof_mbr(struct boot_params, struct_member), \
}
struct boot_params_to_save {
unsigned int start;
unsigned int len;
};
static void sanitize_boot_params(struct boot_params *boot_params) static void sanitize_boot_params(struct boot_params *boot_params)
{ {
/* /*
@ -35,21 +49,40 @@ static void sanitize_boot_params(struct boot_params *boot_params)
* problems again. * problems again.
*/ */
if (boot_params->sentinel) { if (boot_params->sentinel) {
/* fields in boot_params are left uninitialized, clear them */ static struct boot_params scratch;
boot_params->acpi_rsdp_addr = 0; char *bp_base = (char *)boot_params;
memset(&boot_params->ext_ramdisk_image, 0, char *save_base = (char *)&scratch;
(char *)&boot_params->efi_info - int i;
(char *)&boot_params->ext_ramdisk_image);
memset(&boot_params->kbd_status, 0, const struct boot_params_to_save to_save[] = {
(char *)&boot_params->hdr - BOOT_PARAM_PRESERVE(screen_info),
(char *)&boot_params->kbd_status); BOOT_PARAM_PRESERVE(apm_bios_info),
memset(&boot_params->_pad7[0], 0, BOOT_PARAM_PRESERVE(tboot_addr),
(char *)&boot_params->edd_mbr_sig_buffer[0] - BOOT_PARAM_PRESERVE(ist_info),
(char *)&boot_params->_pad7[0]); BOOT_PARAM_PRESERVE(acpi_rsdp_addr),
memset(&boot_params->_pad8[0], 0, BOOT_PARAM_PRESERVE(hd0_info),
(char *)&boot_params->eddbuf[0] - BOOT_PARAM_PRESERVE(hd1_info),
(char *)&boot_params->_pad8[0]); BOOT_PARAM_PRESERVE(sys_desc_table),
memset(&boot_params->_pad9[0], 0, sizeof(boot_params->_pad9)); BOOT_PARAM_PRESERVE(olpc_ofw_header),
BOOT_PARAM_PRESERVE(efi_info),
BOOT_PARAM_PRESERVE(alt_mem_k),
BOOT_PARAM_PRESERVE(scratch),
BOOT_PARAM_PRESERVE(e820_entries),
BOOT_PARAM_PRESERVE(eddbuf_entries),
BOOT_PARAM_PRESERVE(edd_mbr_sig_buf_entries),
BOOT_PARAM_PRESERVE(edd_mbr_sig_buffer),
BOOT_PARAM_PRESERVE(e820_table),
BOOT_PARAM_PRESERVE(eddbuf),
};
memset(&scratch, 0, sizeof(scratch));
for (i = 0; i < ARRAY_SIZE(to_save); i++) {
memcpy(save_base + to_save[i].start,
bp_base + to_save[i].start, to_save[i].len);
}
memcpy(boot_params, save_base, sizeof(*boot_params));
} }
} }

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@ -184,7 +184,8 @@ void __init default_setup_apic_routing(void)
def_to_bigsmp = 0; def_to_bigsmp = 0;
break; break;
} }
/* If P4 and above fall through */ /* P4 and above */
/* fall through */
case X86_VENDOR_HYGON: case X86_VENDOR_HYGON:
case X86_VENDOR_AMD: case X86_VENDOR_AMD:
def_to_bigsmp = 1; def_to_bigsmp = 1;

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@ -17,6 +17,12 @@
*/ */
static u32 umwait_control_cached = UMWAIT_CTRL_VAL(100000, UMWAIT_C02_ENABLE); static u32 umwait_control_cached = UMWAIT_CTRL_VAL(100000, UMWAIT_C02_ENABLE);
/*
* Cache the original IA32_UMWAIT_CONTROL MSR value which is configured by
* hardware or BIOS before kernel boot.
*/
static u32 orig_umwait_control_cached __ro_after_init;
/* /*
* Serialize access to umwait_control_cached and IA32_UMWAIT_CONTROL MSR in * Serialize access to umwait_control_cached and IA32_UMWAIT_CONTROL MSR in
* the sysfs write functions. * the sysfs write functions.
@ -52,6 +58,23 @@ static int umwait_cpu_online(unsigned int cpu)
return 0; return 0;
} }
/*
* The CPU hotplug callback sets the control MSR to the original control
* value.
*/
static int umwait_cpu_offline(unsigned int cpu)
{
/*
* This code is protected by the CPU hotplug already and
* orig_umwait_control_cached is never changed after it caches
* the original control MSR value in umwait_init(). So there
* is no race condition here.
*/
wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0);
return 0;
}
/* /*
* On resume, restore IA32_UMWAIT_CONTROL MSR on the boot processor which * On resume, restore IA32_UMWAIT_CONTROL MSR on the boot processor which
* is the only active CPU at this time. The MSR is set up on the APs via the * is the only active CPU at this time. The MSR is set up on the APs via the
@ -185,8 +208,22 @@ static int __init umwait_init(void)
if (!boot_cpu_has(X86_FEATURE_WAITPKG)) if (!boot_cpu_has(X86_FEATURE_WAITPKG))
return -ENODEV; return -ENODEV;
/*
* Cache the original control MSR value before the control MSR is
* changed. This is the only place where orig_umwait_control_cached
* is modified.
*/
rdmsrl(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);
ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "umwait:online", ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "umwait:online",
umwait_cpu_online, NULL); umwait_cpu_online, umwait_cpu_offline);
if (ret < 0) {
/*
* On failure, the control MSR on all CPUs has the
* original control value.
*/
return ret;
}
register_syscore_ops(&umwait_syscore_ops); register_syscore_ops(&umwait_syscore_ops);

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@ -178,13 +178,15 @@ void FPU_printall(void)
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
FPU_REG *r = &st(i); FPU_REG *r = &st(i);
u_char tagi = FPU_gettagi(i); u_char tagi = FPU_gettagi(i);
switch (tagi) { switch (tagi) {
case TAG_Empty: case TAG_Empty:
continue; continue;
break;
case TAG_Zero: case TAG_Zero:
case TAG_Special: case TAG_Special:
/* Update tagi for the printk below */
tagi = FPU_Special(r); tagi = FPU_Special(r);
/* fall through */
case TAG_Valid: case TAG_Valid:
printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i, printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
getsign(r) ? '-' : '+', getsign(r) ? '-' : '+',
@ -198,7 +200,6 @@ void FPU_printall(void)
printk("Whoops! Error in errors.c: tag%d is %d ", i, printk("Whoops! Error in errors.c: tag%d is %d ", i,
tagi); tagi);
continue; continue;
break;
} }
printk("%s\n", tag_desc[(int)(unsigned)tagi]); printk("%s\n", tag_desc[(int)(unsigned)tagi]);
} }

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@ -1352,7 +1352,7 @@ static void fyl2xp1(FPU_REG *st0_ptr, u_char st0_tag)
case TW_Denormal: case TW_Denormal:
if (denormal_operand() < 0) if (denormal_operand() < 0)
return; return;
/* fall through */
case TAG_Zero: case TAG_Zero:
case TAG_Valid: case TAG_Valid:
setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr)); setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr));