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arm/tegra: prepare early init for multiple tegra variants 

This patch splits the early init code in a common and a tegra20 specific part.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
hifive-unleashed-5.1
Peter De Schrijver 2011-12-14 17:03:17 +02:00 committed by Olof Johansson
parent 8e4fab2c39
commit c37c07ddf2
7 changed files with 34 additions and 27 deletions
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19
arch/arm/mach-tegra/board-dt.c
View File

@ -53,17 +53,6 @@ void seaboard_pinmux_init(void);
void trimslice_pinmux_init(void);
void ventana_pinmux_init(void);
static const struct of_device_id tegra_dt_irq_match[] __initconst = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
{ }
};
void __init tegra_dt_init_irq(void)
{
tegra_init_irq();
of_irq_init(tegra_dt_irq_match);
}
struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
@ -139,7 +128,7 @@ static void __init tegra_dt_init(void)
"Unknown platform! Pinmuxing not initialized\n");
}
static const char * tegra_dt_board_compat[] = {
static const char *tegra20_dt_board_compat[] = {
"compulab,trimslice",
"nvidia,harmony",
"compal,paz00",
@ -148,12 +137,12 @@ static const char * tegra_dt_board_compat[] = {
NULL
};
DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_dt_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_dt_init,
.dt_compat = tegra_dt_board_compat,
.dt_compat = tegra20_dt_board_compat,
MACHINE_END

2
arch/arm/mach-tegra/board-harmony.c
View File

@ -186,7 +186,7 @@ MACHINE_START(HARMONY, "harmony")
.atag_offset = 0x100,
.fixup = tegra_harmony_fixup,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,

2
arch/arm/mach-tegra/board-paz00.c
View File

@ -189,7 +189,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
.atag_offset = 0x100,
.fixup = tegra_paz00_fixup,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,

6
arch/arm/mach-tegra/board-seaboard.c
View File

@ -283,7 +283,7 @@ static void __init tegra_wario_init(void)
MACHINE_START(SEABOARD, "seaboard")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
@ -293,7 +293,7 @@ MACHINE_END
MACHINE_START(KAEN, "kaen")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
@ -303,7 +303,7 @@ MACHINE_END
MACHINE_START(WARIO, "wario")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,

2
arch/arm/mach-tegra/board-trimslice.c
View File

@ -175,7 +175,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
.atag_offset = 0x100,
.fixup = tegra_trimslice_fixup,
.map_io = tegra_map_common_io,
.init_early = tegra_init_early,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,

3
arch/arm/mach-tegra/board.h
View File

@ -25,9 +25,10 @@
void tegra_assert_system_reset(char mode, const char *cmd);
void __init tegra_init_early(void);
void __init tegra20_init_early(void);
void __init tegra_map_common_io(void);
void __init tegra_init_irq(void);
void __init tegra_dt_init_irq(void);
void __init tegra_init_clock(void);
int __init tegra_pcie_init(bool init_port0, bool init_port1);

27
arch/arm/mach-tegra/common.c
View File

@ -1,5 +1,5 @@
/*
* arch/arm/mach-tegra/board-harmony.c
* arch/arm/mach-tegra/common.c
*
* Copyright (C) 2010 Google, Inc.
*
@ -21,8 +21,10 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/of_irq.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <mach/iomap.h>
#include <mach/system.h>
@ -33,6 +35,17 @@
void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
static const struct of_device_id tegra_dt_irq_match[] __initconst = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
{ }
};
void __init tegra_dt_init_irq(void)
{
tegra_init_irq();
of_irq_init(tegra_dt_irq_match);
}
void tegra_assert_system_reset(char mode, const char *cmd)
{
void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
@ -44,7 +57,8 @@ void tegra_assert_system_reset(char mode, const char *cmd)
writel_relaxed(reg, reset);
}
static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
/* name parent rate enabled */
{ "clk_m", NULL, 0, true },
{ "pll_p", "clk_m", 216000000, true },
@ -60,6 +74,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ "cpu", NULL, 0, true },
{ NULL, NULL, 0, 0},
};
#endif
static void __init tegra_init_cache(void)
{
@ -74,10 +89,12 @@ static void __init tegra_init_cache(void)
}
void __init tegra_init_early(void)
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
void __init tegra20_init_early(void)
{
tegra_init_fuse();
tegra_init_clock();
tegra_clk_init_from_table(common_clk_init_table);
tegra2_init_clocks();
tegra_clk_init_from_table(tegra20_clk_init_table);
tegra_init_cache();
}
#endif