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i2c: xiic: must always write 16-bit words to TX_FIFO 

The TX_FIFO register is 10 bits wide.  The lower 8 bits are the data to be
written, while the upper two bits are flags to indicate stop/start.

The driver apparently attempted to optimize write access, by only writing a
byte in those cases where the stop/start bits are zero.  However, we have
seen cases where the lower byte is duplicated onto the upper byte by the
hardware, which causes inadvertent stop/starts.

This patch changes the write access to the transmit FIFO to always be 16 bits
wide.

Signed off by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
hifive-unleashed-5.1
Steven A. Falco 2013-04-22 09:34:39 +00:00 committed by Wolfram Sang
parent 73f37dc3aa
commit c39e8e4354
1 changed files with 2 additions and 4 deletions
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6
drivers/i2c/busses/i2c-xiic.c
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@ -312,10 +312,8 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
/* last message in transfer -> STOP */
data |= XIIC_TX_DYN_STOP_MASK;
dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
} else
xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
}
xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
}
}