ARM: at91: pm: introduce at91_soc_pm structure
To have per SoC PM information add a new structure which embed a member of type struct at91_pm_data. This will allow easy addition of new information without contaminate struct at91_pm_data that is passed to the last phase suspend function (at91_suspend_sram_fn). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>hifive-unleashed-5.2
Claudiu Beznea
Ludovic Desroches
parent
9e98c678c2
commit
c3f5b8fde7
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@ -39,6 +39,17 @@ extern void at91_pinctrl_gpio_suspend(void);
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extern void at91_pinctrl_gpio_resume(void);
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#endif
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struct at91_soc_pm {
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struct at91_pm_data data;
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};
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static struct at91_soc_pm soc_pm = {
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.data = {
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.standby_mode = AT91_PM_STANDBY,
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.suspend_mode = AT91_PM_ULP0,
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},
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};
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static const match_table_t pm_modes __initconst = {
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{ AT91_PM_STANDBY, "standby" },
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{ AT91_PM_ULP0, "ulp0" },
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@ -47,16 +58,11 @@ static const match_table_t pm_modes __initconst = {
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{ -1, NULL },
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};
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static struct at91_pm_data pm_data = {
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.standby_mode = AT91_PM_STANDBY,
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.suspend_mode = AT91_PM_ULP0,
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};
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#define at91_ramc_read(id, field) \
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__raw_readl(pm_data.ramc[id] + field)
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__raw_readl(soc_pm.data.ramc[id] + field)
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#define at91_ramc_write(id, field, value) \
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__raw_writel(value, pm_data.ramc[id] + field)
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__raw_writel(value, soc_pm.data.ramc[id] + field)
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static int at91_pm_valid_state(suspend_state_t state)
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{
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@ -116,21 +122,21 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set)
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if (pm_mode != AT91_PM_ULP1)
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return 0;
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if (!pm_data.pmc || !pm_data.shdwc)
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if (!soc_pm.data.pmc || !soc_pm.data.shdwc)
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return -EPERM;
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if (!set) {
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writel(mode, pm_data.pmc + AT91_PMC_FSMR);
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writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);
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return 0;
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}
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/* SHDWC.WUIR */
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val = readl(pm_data.shdwc + 0x0c);
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val = readl(soc_pm.data.shdwc + 0x0c);
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mode |= (val & 0x3ff);
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polarity |= ((val >> 16) & 0x3ff);
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/* SHDWC.MR */
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val = readl(pm_data.shdwc + 0x04);
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val = readl(soc_pm.data.shdwc + 0x04);
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/* Loop through defined wakeup sources. */
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for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
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@ -155,8 +161,8 @@ put_device:
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}
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if (mode) {
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writel(mode, pm_data.pmc + AT91_PMC_FSMR);
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writel(polarity, pm_data.pmc + AT91_PMC_FSPR);
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writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);
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writel(polarity, soc_pm.data.pmc + AT91_PMC_FSPR);
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} else {
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pr_err("AT91: PM: no ULP1 wakeup sources found!");
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}
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@ -171,18 +177,18 @@ static int at91_pm_begin(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_MEM:
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pm_data.mode = pm_data.suspend_mode;
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soc_pm.data.mode = soc_pm.data.suspend_mode;
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break;
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case PM_SUSPEND_STANDBY:
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pm_data.mode = pm_data.standby_mode;
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soc_pm.data.mode = soc_pm.data.standby_mode;
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break;
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default:
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pm_data.mode = -1;
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soc_pm.data.mode = -1;
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}
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return at91_pm_config_ws(pm_data.mode, true);
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return at91_pm_config_ws(soc_pm.data.mode, true);
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}
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/*
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@ -194,10 +200,10 @@ static int at91_pm_verify_clocks(void)
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unsigned long scsr;
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int i;
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scsr = readl(pm_data.pmc + AT91_PMC_SCSR);
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scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR);
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/* USB must not be using PLLB */
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if ((scsr & pm_data.uhp_udp_mask) != 0) {
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if ((scsr & soc_pm.data.uhp_udp_mask) != 0) {
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pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
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return 0;
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}
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@ -208,7 +214,7 @@ static int at91_pm_verify_clocks(void)
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if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
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continue;
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css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
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css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
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if (css != AT91_PMC_CSS_SLOW) {
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pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
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return 0;
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@ -230,7 +236,7 @@ static int at91_pm_verify_clocks(void)
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*/
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int at91_suspend_entering_slow_clock(void)
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{
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return (pm_data.mode >= AT91_PM_ULP0);
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return (soc_pm.data.mode >= AT91_PM_ULP0);
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}
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EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
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@ -243,14 +249,14 @@ static int at91_suspend_finish(unsigned long val)
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flush_cache_all();
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outer_disable();
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at91_suspend_sram_fn(&pm_data);
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at91_suspend_sram_fn(&soc_pm.data);
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return 0;
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}
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static void at91_pm_suspend(suspend_state_t state)
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{
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if (pm_data.mode == AT91_PM_BACKUP) {
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if (soc_pm.data.mode == AT91_PM_BACKUP) {
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pm_bu->suspended = 1;
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cpu_suspend(0, at91_suspend_finish);
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@ -289,7 +295,7 @@ static int at91_pm_enter(suspend_state_t state)
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/*
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* Ensure that clocks are in a valid state.
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*/
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if (pm_data.mode >= AT91_PM_ULP0 &&
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if (soc_pm.data.mode >= AT91_PM_ULP0 &&
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!at91_pm_verify_clocks())
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goto error;
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@ -318,7 +324,7 @@ error:
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*/
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static void at91_pm_end(void)
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{
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at91_pm_config_ws(pm_data.mode, false);
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at91_pm_config_ws(soc_pm.data.mode, false);
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}
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@ -351,7 +357,7 @@ static void at91rm9200_standby(void)
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" str %2, [%1, %3]\n\t"
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" mcr p15, 0, %0, c7, c0, 4\n\t"
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:
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: "r" (0), "r" (pm_data.ramc[0]),
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: "r" (0), "r" (soc_pm.data.ramc[0]),
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"r" (1), "r" (AT91_MC_SDRAMC_SRR));
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}
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@ -374,7 +380,7 @@ static void at91_ddr_standby(void)
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at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr);
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}
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if (pm_data.ramc[1]) {
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if (soc_pm.data.ramc[1]) {
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saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
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lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
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lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
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@ -392,14 +398,14 @@ static void at91_ddr_standby(void)
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/* self-refresh mode now */
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at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
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if (pm_data.ramc[1])
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if (soc_pm.data.ramc[1])
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at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
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cpu_do_idle();
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at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0);
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at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
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if (pm_data.ramc[1]) {
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if (soc_pm.data.ramc[1]) {
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at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1);
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at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
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}
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@ -429,7 +435,7 @@ static void at91sam9_sdram_standby(void)
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u32 lpr0, lpr1 = 0;
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u32 saved_lpr0, saved_lpr1 = 0;
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if (pm_data.ramc[1]) {
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if (soc_pm.data.ramc[1]) {
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saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
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lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
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lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
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@ -441,13 +447,13 @@ static void at91sam9_sdram_standby(void)
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/* self-refresh mode now */
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at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
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if (pm_data.ramc[1])
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if (soc_pm.data.ramc[1])
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at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
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cpu_do_idle();
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at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
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if (pm_data.ramc[1])
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if (soc_pm.data.ramc[1])
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at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
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}
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@ -480,14 +486,14 @@ static __init void at91_dt_ramc(void)
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const struct ramc_info *ramc;
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for_each_matching_node_and_match(np, ramc_ids, &of_id) {
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pm_data.ramc[idx] = of_iomap(np, 0);
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if (!pm_data.ramc[idx])
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soc_pm.data.ramc[idx] = of_iomap(np, 0);
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if (!soc_pm.data.ramc[idx])
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panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
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ramc = of_id->data;
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if (!standby)
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standby = ramc->idle;
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pm_data.memctrl = ramc->memctrl;
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soc_pm.data.memctrl = ramc->memctrl;
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idx++;
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}
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@ -509,12 +515,12 @@ static void at91rm9200_idle(void)
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* Disable the processor clock. The processor will be automatically
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* re-enabled by an interrupt or by a reset.
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*/
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writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
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writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
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}
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static void at91sam9_idle(void)
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{
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writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
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writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
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cpu_do_idle();
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}
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@ -566,8 +572,8 @@ static void __init at91_pm_sram_init(void)
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static bool __init at91_is_pm_mode_active(int pm_mode)
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{
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return (pm_data.standby_mode == pm_mode ||
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pm_data.suspend_mode == pm_mode);
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return (soc_pm.data.standby_mode == pm_mode ||
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soc_pm.data.suspend_mode == pm_mode);
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}
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static int __init at91_pm_backup_init(void)
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@ -586,7 +592,7 @@ static int __init at91_pm_backup_init(void)
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return ret;
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}
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pm_data.sfrbu = of_iomap(np, 0);
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soc_pm.data.sfrbu = of_iomap(np, 0);
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of_node_put(np);
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
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@ -620,8 +626,8 @@ static int __init at91_pm_backup_init(void)
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return 0;
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securam_fail:
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iounmap(pm_data.sfrbu);
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pm_data.sfrbu = NULL;
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iounmap(soc_pm.data.sfrbu);
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soc_pm.data.sfrbu = NULL;
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return ret;
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}
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@ -630,10 +636,10 @@ static void __init at91_pm_use_default_mode(int pm_mode)
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if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP)
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return;
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if (pm_data.standby_mode == pm_mode)
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pm_data.standby_mode = AT91_PM_ULP0;
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if (pm_data.suspend_mode == pm_mode)
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pm_data.suspend_mode = AT91_PM_ULP0;
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if (soc_pm.data.standby_mode == pm_mode)
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soc_pm.data.standby_mode = AT91_PM_ULP0;
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if (soc_pm.data.suspend_mode == pm_mode)
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soc_pm.data.suspend_mode = AT91_PM_ULP0;
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}
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static void __init at91_pm_modes_init(void)
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@ -651,7 +657,7 @@ static void __init at91_pm_modes_init(void)
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goto ulp1_default;
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}
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pm_data.shdwc = of_iomap(np, 0);
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soc_pm.data.shdwc = of_iomap(np, 0);
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of_node_put(np);
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ret = at91_pm_backup_init();
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@ -665,8 +671,8 @@ static void __init at91_pm_modes_init(void)
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return;
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unmap:
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iounmap(pm_data.shdwc);
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pm_data.shdwc = NULL;
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iounmap(soc_pm.data.shdwc);
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soc_pm.data.shdwc = NULL;
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ulp1_default:
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at91_pm_use_default_mode(AT91_PM_ULP1);
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backup_default:
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@ -709,14 +715,14 @@ static void __init at91_pm_init(void (*pm_idle)(void))
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platform_device_register(&at91_cpuidle_device);
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pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);
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pm_data.pmc = of_iomap(pmc_np, 0);
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if (!pm_data.pmc) {
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soc_pm.data.pmc = of_iomap(pmc_np, 0);
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if (!soc_pm.data.pmc) {
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pr_err("AT91: PM not supported, PMC not found\n");
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return;
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}
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pmc = of_id->data;
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pm_data.uhp_udp_mask = pmc->uhp_udp_mask;
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soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
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if (pm_idle)
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arm_pm_idle = pm_idle;
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@ -726,8 +732,8 @@ static void __init at91_pm_init(void (*pm_idle)(void))
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if (at91_suspend_sram_fn) {
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suspend_set_ops(&at91_pm_ops);
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pr_info("AT91: PM: standby: %s, suspend: %s\n",
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pm_modes[pm_data.standby_mode].pattern,
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pm_modes[pm_data.suspend_mode].pattern);
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pm_modes[soc_pm.data.standby_mode].pattern,
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pm_modes[soc_pm.data.suspend_mode].pattern);
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} else {
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pr_info("AT91: PM not supported, due to no SRAM allocated\n");
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}
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@ -793,8 +799,8 @@ static int __init at91_pm_modes_select(char *str)
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if (suspend < 0)
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return 0;
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pm_data.standby_mode = standby;
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pm_data.suspend_mode = suspend;
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soc_pm.data.standby_mode = standby;
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soc_pm.data.suspend_mode = suspend;
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return 0;
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}
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