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arm64: dts: imx8mq: properly describe IRQ hierarchy 

The GPCv2 sits between most of the peripherals and the GIC and
functions as a wakeup controller for the CPU cores.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
hifive-unleashed-5.1
Lucas Stach 2019-01-25 17:20:33 +01:00 committed by Shawn Guo
parent 7b25c1c56c
commit c412123f2f
1 changed files with 4 additions and 2 deletions
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6
arch/arm64/boot/dts/freescale/imx8mq.dtsi
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@ -11,8 +11,7 @@
#include "imx8mq-pinfunc.h"
/ {
/* This should really be the GPC, but we need a driver for this first */
interrupt-parent = <&gic>;
interrupt-parent = <&gpc>;
#address-cells = <2>;
#size-cells = <2>;
@ -257,6 +256,9 @@
gpc: gpc@303a0000 {
compatible = "fsl,imx8mq-gpc";
reg = <0x303a0000 0x10000>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <3>;
pgc {
#address-cells = <1>;