[POWERPC] Update mpc7448hpc2 board irq support using device tree
The patch rewrites mpc7448hpc2 board irq support according to the new mpic device tree interface. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>hifive-unleashed-5.1
Zang Roy-r61911
Paul Mackerras
parent
6cdd2bdfb9
commit
c4342ff92b
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@ -1,7 +1,7 @@
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/*
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* mpc7448_hpc2.c
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*
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* Board setup routines for the Freescale Taiga platform
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* Board setup routines for the Freescale mpc7448hpc2(taiga) platform
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*
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* Author: Jacob Pan
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* jacob.pan@freescale.com
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@ -12,10 +12,10 @@
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*
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* Copyright 2004-2006 Freescale Semiconductor, Inc.
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*
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* This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/config.h>
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@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
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extern int tsi108_setup_pci(struct device_node *dev);
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extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
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extern void tsi108_pci_int_init(void);
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extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused);
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/*
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* Define all of the IRQ senses and polarities. Taken from the
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* mpc7448hpc manual.
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* Note: Likely, this table and the following function should be
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* obtained and derived from the OF Device Tree.
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*/
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static u_char mpc7448_hpc2_pic_initsenses[] __initdata = {
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/* External on-board sources */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */
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/* Internal Tsi108/109 interrupt sources */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */
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(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */
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};
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extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs);
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int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
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{
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@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void)
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{
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struct mpic *mpic;
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phys_addr_t mpic_paddr = 0;
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unsigned int cascade_pci_irq;
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struct device_node *tsi_pci;
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struct device_node *tsi_pic;
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tsi_pic = of_find_node_by_type(NULL, "open-pic");
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@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void)
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DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__,
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(u32) mpic_paddr);
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mpic = mpic_alloc(mpic_paddr,
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mpic = mpic_alloc(tsi_pic, mpic_paddr,
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MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
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MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108),
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0, /* num_sources used */
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TSI108_IRQ_BASE,
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0, /* num_sources used */
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NR_IRQS - 4 /* XXXX */,
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mpc7448_hpc2_pic_initsenses,
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sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC");
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"Tsi108_PIC");
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BUG_ON(mpic == NULL); /* XXXX */
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mpic_init(mpic);
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mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic);
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tsi_pci = of_find_node_by_type(NULL, "pci");
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if (tsi_pci == 0) {
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printk("%s: No tsi108 pci node found !\n", __FUNCTION__);
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return;
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}
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cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
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set_irq_data(cascade_pci_irq, mpic);
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set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
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tsi108_pci_int_init();
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/* Configure MPIC outputs to CPU0 */
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tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
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of_node_put(tsi_pic);
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}
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void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
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@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs)
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return 0;
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}
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define_machine(mpc7448_hpc2){
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.name = "MPC7448 HPC2",
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.probe = mpc7448_hpc2_probe,
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@ -93,13 +93,15 @@ static int __init tsi108_eth_of_init(void)
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goto err;
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r[1].name = "tx";
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r[1].start = np->intrs[0].line;
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r[1].end = np->intrs[0].line;
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r[1].start = irq_of_parse_and_map(np, 0);
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r[1].end = irq_of_parse_and_map(np, 0);
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r[1].flags = IORESOURCE_IRQ;
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DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n",
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__FUNCTION__,r[1].name, r[1].start, r[1].end);
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tsi_eth_dev =
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platform_device_register_simple("tsi-ethernet", i, &r[0],
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np->n_intrs + 1);
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1);
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if (IS_ERR(tsi_eth_dev)) {
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ret = PTR_ERR(tsi_eth_dev);
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@ -127,7 +129,7 @@ static int __init tsi108_eth_of_init(void)
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tsi_eth_data.regs = r[0].start;
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tsi_eth_data.phyregs = res.start;
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tsi_eth_data.phy = *phy_id;
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tsi_eth_data.irq_num = np->intrs[0].line;
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tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0);
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of_node_put(phy);
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ret =
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platform_device_add_data(tsi_eth_dev, &tsi_eth_data,
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@ -26,7 +26,6 @@
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/byteorder.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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@ -228,7 +227,7 @@ int __init tsi108_setup_pci(struct device_node *dev)
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(hose)->ops = &tsi108_direct_pci_ops;
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printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. "
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printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. "
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"Firmware bus number: %d->%d\n",
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rsrc.start, hose->first_busno, hose->last_busno);
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@ -278,7 +277,7 @@ static void init_pci_source(void)
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mb();
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}
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static inline int get_pci_source(void)
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static inline unsigned int get_pci_source(void)
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{
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u_int temp = 0;
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int irq = -1;
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@ -371,12 +370,12 @@ static void tsi108_pci_irq_end(u_int irq)
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* Interrupt controller descriptor for cascaded PCI interrupt controller.
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*/
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struct hw_interrupt_type tsi108_pci_irq = {
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static struct irq_chip tsi108_pci_irq = {
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.typename = "tsi108_PCI_int",
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.enable = tsi108_pci_irq_enable,
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.disable = tsi108_pci_irq_disable,
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.mask = tsi108_pci_irq_disable,
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.ack = tsi108_pci_irq_ack,
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.end = tsi108_pci_irq_end,
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.unmask = tsi108_pci_irq_enable,
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};
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/*
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@ -399,14 +398,18 @@ void __init tsi108_pci_int_init(void)
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DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
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for (i = 0; i < NUM_PCI_IRQS; i++) {
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irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq;
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irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq;
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irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL;
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}
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init_pci_source();
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}
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int tsi108_irq_cascade(struct pt_regs *regs, void *unused)
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void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
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struct pt_regs *regs)
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{
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return get_pci_source();
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unsigned int cascade_irq = get_pci_source();
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if (cascade_irq != NO_IRQ)
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generic_handle_irq(cascade_irq, regs);
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desc->chip->eoi(irq);
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}
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@ -1,16 +1,18 @@
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/*
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* include/asm-ppc/tsi108.h
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*
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* common routine and memory layout for Tundra TSI108(Grendel) host bridge
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* memory controller.
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*
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* Author: Jacob Pan (jacob.pan@freescale.com)
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* Alex Bounine (alexandreb@tundra.com)
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* 2004 (c) Freescale Semiconductor Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Copyright 2004-2006 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __PPC_KERNEL_TSI108_H
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#define __PPC_KERNEL_TSI108_H
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@ -0,0 +1,124 @@
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/*
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* (C) Copyright 2005 Tundra Semiconductor Corp.
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* Alex Bounine, <alexandreb at tundra.com).
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* definitions for interrupt controller initialization and external interrupt
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* demultiplexing on TSI108EMU/SVB boards.
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*/
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#ifndef _ASM_PPC_TSI108_IRQ_H
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#define _ASM_PPC_TSI108_IRQ_H
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/*
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* Tsi108 interrupts
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*/
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#ifndef TSI108_IRQ_REG_BASE
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#define TSI108_IRQ_REG_BASE 0
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#endif
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#define TSI108_IRQ(x) (TSI108_IRQ_REG_BASE + (x))
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#define TSI108_MAX_VECTORS (36 + 4) /* 36 sources + PCI INT demux */
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#define MAX_TASK_PRIO 0xF
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#define TSI108_IRQ_SPURIOUS (TSI108_MAX_VECTORS)
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#define DEFAULT_PRIO_LVL 10 /* initial priority level */
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/* Interrupt vectors assignment to external and internal
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* sources of requests. */
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/* EXTERNAL INTERRUPT SOURCES */
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#define IRQ_TSI108_EXT_INT0 TSI108_IRQ(0) /* External Source at INT[0] */
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#define IRQ_TSI108_EXT_INT1 TSI108_IRQ(1) /* External Source at INT[1] */
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#define IRQ_TSI108_EXT_INT2 TSI108_IRQ(2) /* External Source at INT[2] */
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#define IRQ_TSI108_EXT_INT3 TSI108_IRQ(3) /* External Source at INT[3] */
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/* INTERNAL INTERRUPT SOURCES */
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#define IRQ_TSI108_RESERVED0 TSI108_IRQ(4) /* Reserved IRQ */
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#define IRQ_TSI108_RESERVED1 TSI108_IRQ(5) /* Reserved IRQ */
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#define IRQ_TSI108_RESERVED2 TSI108_IRQ(6) /* Reserved IRQ */
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#define IRQ_TSI108_RESERVED3 TSI108_IRQ(7) /* Reserved IRQ */
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#define IRQ_TSI108_DMA0 TSI108_IRQ(8) /* DMA0 */
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#define IRQ_TSI108_DMA1 TSI108_IRQ(9) /* DMA1 */
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#define IRQ_TSI108_DMA2 TSI108_IRQ(10) /* DMA2 */
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#define IRQ_TSI108_DMA3 TSI108_IRQ(11) /* DMA3 */
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#define IRQ_TSI108_UART0 TSI108_IRQ(12) /* UART0 */
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#define IRQ_TSI108_UART1 TSI108_IRQ(13) /* UART1 */
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#define IRQ_TSI108_I2C TSI108_IRQ(14) /* I2C */
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#define IRQ_TSI108_GPIO TSI108_IRQ(15) /* GPIO */
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#define IRQ_TSI108_GIGE0 TSI108_IRQ(16) /* GIGE0 */
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#define IRQ_TSI108_GIGE1 TSI108_IRQ(17) /* GIGE1 */
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#define IRQ_TSI108_RESERVED4 TSI108_IRQ(18) /* Reserved IRQ */
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#define IRQ_TSI108_HLP TSI108_IRQ(19) /* HLP */
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#define IRQ_TSI108_SDRAM TSI108_IRQ(20) /* SDC */
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#define IRQ_TSI108_PROC_IF TSI108_IRQ(21) /* Processor IF */
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#define IRQ_TSI108_RESERVED5 TSI108_IRQ(22) /* Reserved IRQ */
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#define IRQ_TSI108_PCI TSI108_IRQ(23) /* PCI/X block */
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#define IRQ_TSI108_MBOX0 TSI108_IRQ(24) /* Mailbox 0 register */
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#define IRQ_TSI108_MBOX1 TSI108_IRQ(25) /* Mailbox 1 register */
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#define IRQ_TSI108_MBOX2 TSI108_IRQ(26) /* Mailbox 2 register */
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#define IRQ_TSI108_MBOX3 TSI108_IRQ(27) /* Mailbox 3 register */
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#define IRQ_TSI108_DBELL0 TSI108_IRQ(28) /* Doorbell 0 */
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#define IRQ_TSI108_DBELL1 TSI108_IRQ(29) /* Doorbell 1 */
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#define IRQ_TSI108_DBELL2 TSI108_IRQ(30) /* Doorbell 2 */
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#define IRQ_TSI108_DBELL3 TSI108_IRQ(31) /* Doorbell 3 */
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#define IRQ_TSI108_TIMER0 TSI108_IRQ(32) /* Global Timer 0 */
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#define IRQ_TSI108_TIMER1 TSI108_IRQ(33) /* Global Timer 1 */
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#define IRQ_TSI108_TIMER2 TSI108_IRQ(34) /* Global Timer 2 */
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#define IRQ_TSI108_TIMER3 TSI108_IRQ(35) /* Global Timer 3 */
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/*
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* PCI bus INTA# - INTD# lines demultiplexor
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*/
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#define IRQ_PCI_INTAD_BASE TSI108_IRQ(36)
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#define IRQ_PCI_INTA (IRQ_PCI_INTAD_BASE + 0)
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#define IRQ_PCI_INTB (IRQ_PCI_INTAD_BASE + 1)
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#define IRQ_PCI_INTC (IRQ_PCI_INTAD_BASE + 2)
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#define IRQ_PCI_INTD (IRQ_PCI_INTAD_BASE + 3)
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#define NUM_PCI_IRQS (4)
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/* number of entries in vector dispatch table */
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#define IRQ_TSI108_TAB_SIZE (TSI108_MAX_VECTORS + 1)
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/* Mapping of MPIC outputs to processors' interrupt pins */
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#define IDIR_INT_OUT0 0x1
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#define IDIR_INT_OUT1 0x2
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#define IDIR_INT_OUT2 0x4
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#define IDIR_INT_OUT3 0x8
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/*---------------------------------------------------------------
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* IRQ line configuration parameters */
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/* Interrupt delivery modes */
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typedef enum {
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TSI108_IRQ_DIRECTED,
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TSI108_IRQ_DISTRIBUTED,
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} TSI108_IRQ_MODE;
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#endif /* _ASM_PPC_TSI108_IRQ_H */
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