drm/i915/ringbuffer: Handle cliprects in the caller
This makes the various rings more consistent by removing the anomalous handing of the rendering ring execbuffer dispatch. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
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70eac33e7a
commit
c4e7a41467
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@ -352,16 +352,16 @@ static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
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int
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i915_emit_box(struct drm_device *dev,
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struct drm_clip_rect *boxes,
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int i, int DR1, int DR4)
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struct drm_clip_rect *box,
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int DR1, int DR4)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_clip_rect box = boxes[i];
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int ret;
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if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
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if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
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box->y2 <= 0 || box->x2 <= 0) {
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DRM_ERROR("Bad box %d,%d..%d,%d\n",
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box.x1, box.y1, box.x2, box.y2);
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box->x1, box->y1, box->x2, box->y2);
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return -EINVAL;
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}
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@ -371,8 +371,8 @@ i915_emit_box(struct drm_device *dev,
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return ret;
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OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
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OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
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OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
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OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
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OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
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OUT_RING(DR4);
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} else {
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ret = BEGIN_LP_RING(6);
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@ -381,8 +381,8 @@ i915_emit_box(struct drm_device *dev,
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OUT_RING(GFX_OP_DRAWRECT_INFO);
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OUT_RING(DR1);
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OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
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OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
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OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
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OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
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OUT_RING(DR4);
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OUT_RING(0);
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}
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@ -434,7 +434,7 @@ static int i915_dispatch_cmdbuffer(struct drm_device * dev,
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for (i = 0; i < count; i++) {
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if (i < nbox) {
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ret = i915_emit_box(dev, cliprects, i,
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ret = i915_emit_box(dev, &cliprects[i],
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cmd->DR1, cmd->DR4);
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if (ret)
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return ret;
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@ -467,7 +467,7 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev,
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count = nbox ? nbox : 1;
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for (i = 0; i < count; i++) {
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if (i < nbox) {
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ret = i915_emit_box(dev, cliprects, i,
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ret = i915_emit_box(dev, &cliprects[i],
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batch->DR1, batch->DR4);
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if (ret)
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return ret;
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@ -966,8 +966,8 @@ extern int i915_driver_device_is_agp(struct drm_device * dev);
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extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg);
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extern int i915_emit_box(struct drm_device *dev,
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struct drm_clip_rect *boxes,
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int i, int DR1, int DR4);
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struct drm_clip_rect *box,
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int DR1, int DR4);
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extern int i915_reset(struct drm_device *dev, u8 flags);
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extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
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extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
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@ -825,6 +825,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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struct drm_i915_gem_object *batch_obj;
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struct drm_clip_rect *cliprects = NULL;
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struct intel_ring_buffer *ring;
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u32 exec_start, exec_len;
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int ret, i;
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if (!i915_gem_check_execbuffer(args)) {
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@ -871,6 +872,11 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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}
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if (args->num_cliprects != 0) {
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if (ring != &dev_priv->render_ring) {
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DRM_ERROR("clip rectangles are only valid with the render ring\n");
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return -EINVAL;
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}
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cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
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GFP_KERNEL);
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if (cliprects == NULL) {
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@ -959,11 +965,25 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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if (ret)
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goto err;
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ret = ring->dispatch_execbuffer(ring,
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args, cliprects,
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batch_obj->gtt_offset);
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if (ret)
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goto err;
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exec_start = batch_obj->gtt_offset + args->batch_start_offset;
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exec_len = args->batch_len;
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if (cliprects) {
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for (i = 0; i < args->num_cliprects; i++) {
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ret = i915_emit_box(dev, &cliprects[i],
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args->DR1, args->DR4);
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if (ret)
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goto err;
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ret = ring->dispatch_execbuffer(ring,
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exec_start, exec_len);
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if (ret)
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goto err;
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}
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} else {
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ret = ring->dispatch_execbuffer(ring, exec_start, exec_len);
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if (ret)
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goto err;
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}
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i915_gem_execbuffer_move_to_active(&objects, ring);
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i915_gem_execbuffer_retire_commands(dev, file, ring);
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@ -508,25 +508,18 @@ ring_status_page_get_seqno(struct intel_ring_buffer *ring)
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}
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static int
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ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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struct drm_i915_gem_execbuffer2 *exec,
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struct drm_clip_rect *cliprects,
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uint64_t exec_offset)
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ring_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length)
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{
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uint32_t exec_start;
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int ret;
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exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
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ret = intel_ring_begin(ring, 2);
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if (ret)
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return ret;
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intel_ring_emit(ring,
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MI_BATCH_BUFFER_START |
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(2 << 6) |
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MI_BATCH_BUFFER_START | (2 << 6) |
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MI_BATCH_NON_SECURE_I965);
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intel_ring_emit(ring, exec_start);
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intel_ring_emit(ring, offset);
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intel_ring_advance(ring);
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return 0;
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@ -534,58 +527,40 @@ ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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static int
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render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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struct drm_i915_gem_execbuffer2 *exec,
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struct drm_clip_rect *cliprects,
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uint64_t exec_offset)
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u32 offset, u32 len)
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{
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struct drm_device *dev = ring->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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int nbox = exec->num_cliprects;
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uint32_t exec_start, exec_len;
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int i, count, ret;
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exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
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exec_len = (uint32_t) exec->batch_len;
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int ret;
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trace_i915_gem_request_submit(dev, dev_priv->next_seqno + 1);
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count = nbox ? nbox : 1;
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for (i = 0; i < count; i++) {
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if (i < nbox) {
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ret = i915_emit_box(dev, cliprects, i,
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exec->DR1, exec->DR4);
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if (ret)
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return ret;
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}
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if (IS_I830(dev) || IS_845G(dev)) {
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ret = intel_ring_begin(ring, 4);
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if (ret)
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return ret;
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if (IS_I830(dev) || IS_845G(dev)) {
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ret = intel_ring_begin(ring, 4);
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if (ret)
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return ret;
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intel_ring_emit(ring, MI_BATCH_BUFFER);
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intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);
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intel_ring_emit(ring, offset + len - 8);
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intel_ring_emit(ring, 0);
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} else {
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ret = intel_ring_begin(ring, 2);
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if (ret)
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return ret;
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intel_ring_emit(ring, MI_BATCH_BUFFER);
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intel_ring_emit(ring, exec_start | MI_BATCH_NON_SECURE);
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intel_ring_emit(ring, exec_start + exec_len - 4);
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intel_ring_emit(ring, 0);
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if (INTEL_INFO(dev)->gen >= 4) {
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intel_ring_emit(ring,
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MI_BATCH_BUFFER_START | (2 << 6) |
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MI_BATCH_NON_SECURE_I965);
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intel_ring_emit(ring, offset);
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} else {
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ret = intel_ring_begin(ring, 2);
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if (ret)
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return ret;
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if (INTEL_INFO(dev)->gen >= 4) {
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intel_ring_emit(ring,
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MI_BATCH_BUFFER_START | (2 << 6)
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| MI_BATCH_NON_SECURE_I965);
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intel_ring_emit(ring, exec_start);
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} else {
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intel_ring_emit(ring, MI_BATCH_BUFFER_START
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| (2 << 6));
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intel_ring_emit(ring, exec_start |
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MI_BATCH_NON_SECURE);
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}
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intel_ring_emit(ring,
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MI_BATCH_BUFFER_START | (2 << 6));
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intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);
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}
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intel_ring_advance(ring);
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}
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intel_ring_advance(ring);
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return 0;
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}
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@ -904,22 +879,17 @@ static void gen6_ring_flush(struct intel_ring_buffer *ring,
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static int
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gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,
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struct drm_i915_gem_execbuffer2 *exec,
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struct drm_clip_rect *cliprects,
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uint64_t exec_offset)
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u32 offset, u32 len)
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{
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uint32_t exec_start;
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int ret;
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exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
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ret = intel_ring_begin(ring, 2);
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if (ret)
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return ret;
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intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965);
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/* bit0-7 is the length on GEN6+ */
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intel_ring_emit(ring, exec_start);
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intel_ring_emit(ring, offset);
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intel_ring_advance(ring);
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return 0;
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@ -57,9 +57,7 @@ struct intel_ring_buffer {
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u32 *seqno);
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u32 (*get_seqno)(struct intel_ring_buffer *ring);
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int (*dispatch_execbuffer)(struct intel_ring_buffer *ring,
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struct drm_i915_gem_execbuffer2 *exec,
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struct drm_clip_rect *cliprects,
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uint64_t exec_offset);
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u32 offset, u32 length);
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void (*cleanup)(struct intel_ring_buffer *ring);
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/**
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