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drm/bridge: nwl-dsi: Fix phy_ref clock ordering 

For some reason, the ADV7535 DSI-HDMI converter doesn't have a signal
when the DSI uses a phy_ref of 24M. In order to fix that, put the 27M as
the first option in phy_ref_rates.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Robert Chiras 2019-12-05 11:40:05 +02:00
parent bb8eef6527
commit c4fb88cc05
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/bridge/nwl-dsi/nwl-drv.c
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@ -52,9 +52,9 @@
/* Possible valid PHY reference clock rates*/
static u32 phyref_rates[] = {
24000000,
25000000,
27000000,
25000000,
24000000,
};
/*