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ARM: Orion: XOR: Add support for clk 

Some orion platforms can gate the XOR driver clock. If the clock
exisits, unable/disable it as appropriate.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
hifive-unleashed-5.1
Andrew Lunn 2012-02-19 13:30:26 +01:00 committed by Mike Turquette
parent 1f80b126d0
commit c510182b1c
3 changed files with 21 additions and 5 deletions
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10
arch/arm/mach-kirkwood/common.c
View File

@ -87,7 +87,7 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
void __init kirkwood_clk_init(void)
{
struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
struct clk *crypto;
struct clk *crypto, *xor0, *xor1;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
CLK_IS_ROOT, kirkwood_tclk);
@ -100,8 +100,8 @@ void __init kirkwood_clk_init(void)
usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
kirkwood_register_gate("xor0", CGC_BIT_XOR0);
kirkwood_register_gate("xor1", CGC_BIT_XOR1);
xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
kirkwood_register_gate("pex0", CGC_BIT_PEX0);
kirkwood_register_gate("pex1", CGC_BIT_PEX1);
kirkwood_register_gate("audio", CGC_BIT_AUDIO);
@ -120,6 +120,8 @@ void __init kirkwood_clk_init(void)
orion_clkdev_add(NULL, "orion_nand", runit);
orion_clkdev_add(NULL, "mvsdio", sdio);
orion_clkdev_add(NULL, "mv_crypto", crypto);
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
}
/*****************************************************************************
@ -336,7 +338,6 @@ void __init kirkwood_crypto_init(void)
void __init kirkwood_xor0_init(void)
{
kirkwood_clk_ctrl |= CGC_XOR0;
orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
}
@ -348,7 +349,6 @@ void __init kirkwood_xor0_init(void)
void __init kirkwood_xor1_init(void)
{
kirkwood_clk_ctrl |= CGC_XOR1;
orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
}

15
drivers/dma/mv_xor.c
View File

@ -25,6 +25,7 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <linux/clk.h>
#include <plat/mv_xor.h>
#include "dmaengine.h"
@ -1307,11 +1308,25 @@ static int mv_xor_shared_probe(struct platform_device *pdev)
if (dram)
mv_xor_conf_mbus_windows(msp, dram);
/* Not all platforms can gate the clock, so it is not
* an error if the clock does not exists.
*/
msp->clk = clk_get(&pdev->dev, NULL);
if (!IS_ERR(msp->clk))
clk_prepare_enable(msp->clk);
return 0;
}
static int mv_xor_shared_remove(struct platform_device *pdev)
{
struct mv_xor_shared_private *msp = platform_get_drvdata(pdev);
if (!IS_ERR(msp->clk)) {
clk_disable_unprepare(msp->clk);
clk_put(msp->clk);
}
return 0;
}

1
drivers/dma/mv_xor.h
View File

@ -55,6 +55,7 @@
struct mv_xor_shared_private {
void __iomem *xor_base;
void __iomem *xor_high_base;
struct clk *clk;
};