sh-pfc: sh7724: Remove unused input_pu range
The PFC SH7724 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7724 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>hifive-unleashed-5.1
Laurent Pinchart
parent
52331350b4
commit
c5361517bb
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@ -117,52 +117,6 @@ enum {
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PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
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PINMUX_INPUT_END,
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PINMUX_INPUT_PULLUP_BEGIN,
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PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
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PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
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PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
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PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
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PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
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PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
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PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
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PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
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PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
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PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
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PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
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PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
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PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
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PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
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PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
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PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
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PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
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PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
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PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
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PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
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PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
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PTN7_IN_PU, PTN6_IN_PU, PTN5_IN_PU, PTN4_IN_PU,
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PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
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PTQ7_IN_PU, PTQ6_IN_PU, PTQ5_IN_PU, PTQ4_IN_PU,
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PTQ3_IN_PU, PTQ2_IN_PU, PTQ1_IN_PU, PTQ0_IN_PU,
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PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
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PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
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PTS6_IN_PU, PTS5_IN_PU, PTS4_IN_PU,
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PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
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PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
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PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
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PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
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PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
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PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
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PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
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PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
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PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
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PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
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PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
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PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
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PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
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PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
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PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
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PINMUX_INPUT_PULLUP_END,
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PINMUX_OUTPUT_BEGIN,
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PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
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PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
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@ -574,64 +528,64 @@ enum {
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static const pinmux_enum_t pinmux_data[] = {
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/* PTA GPIO */
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PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
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PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
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PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
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PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
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PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
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PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
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PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
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PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
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PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
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PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
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PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
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PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
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PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
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PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
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PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
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PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
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/* PTB GPIO */
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PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
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PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
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PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
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PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
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PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
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PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
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PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
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PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
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PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
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PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
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PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
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PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
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PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
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PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
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PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
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PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
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/* PTC GPIO */
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PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
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PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
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PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
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PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
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PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
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PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
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PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
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PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
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PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
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PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
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PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
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PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
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PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
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PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
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PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
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PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
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/* PTD GPIO */
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PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
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PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
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PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
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PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
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PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
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PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
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PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
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PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
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PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
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PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
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PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
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PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
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PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
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PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
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PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
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PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
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/* PTE GPIO */
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PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT, PTE7_IN_PU),
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PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT, PTE6_IN_PU),
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PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT, PTE5_IN_PU),
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PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
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PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
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PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
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PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
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PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
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PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
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PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
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PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
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PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
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PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
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PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
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PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
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PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
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/* PTF GPIO */
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PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT, PTF7_IN_PU),
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PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT, PTF6_IN_PU),
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PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT, PTF5_IN_PU),
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PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT, PTF4_IN_PU),
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PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT, PTF3_IN_PU),
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PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT, PTF2_IN_PU),
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PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT, PTF1_IN_PU),
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PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
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PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
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PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
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PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
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PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
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PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
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PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
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PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
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PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
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/* PTG GPIO */
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PINMUX_DATA(PTG5_DATA, PTG5_OUT),
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@ -642,162 +596,162 @@ static const pinmux_enum_t pinmux_data[] = {
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PINMUX_DATA(PTG0_DATA, PTG0_OUT),
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/* PTH GPIO */
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PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT, PTH7_IN_PU),
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PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
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PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
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PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
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PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
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PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
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PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
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PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
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PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
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PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
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PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
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PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
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PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
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PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
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PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
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PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
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/* PTJ GPIO */
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PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
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PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
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PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
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PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
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PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
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PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
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PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
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PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
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PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
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PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
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PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
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/* PTK GPIO */
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PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT, PTK7_IN_PU),
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PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT, PTK6_IN_PU),
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PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT, PTK5_IN_PU),
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PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT, PTK4_IN_PU),
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PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
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PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
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PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
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PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
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PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
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PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
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PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
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PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
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PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
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PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
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PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
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PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
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/* PTL GPIO */
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PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
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PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
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PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
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PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
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PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
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PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT, PTL2_IN_PU),
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PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT, PTL1_IN_PU),
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PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT, PTL0_IN_PU),
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PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
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PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
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PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
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PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
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PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
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PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
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||||
PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
|
||||
PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
|
||||
|
||||
/* PTM GPIO */
|
||||
PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
|
||||
PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
|
||||
PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
|
||||
PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
|
||||
PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
|
||||
PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
|
||||
PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
|
||||
PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
|
||||
PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
|
||||
PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
|
||||
PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
|
||||
PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
|
||||
PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
|
||||
PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
|
||||
PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
|
||||
PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
|
||||
|
||||
/* PTN GPIO */
|
||||
PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT, PTN7_IN_PU),
|
||||
PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT, PTN6_IN_PU),
|
||||
PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT, PTN5_IN_PU),
|
||||
PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT, PTN4_IN_PU),
|
||||
PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT, PTN3_IN_PU),
|
||||
PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT, PTN2_IN_PU),
|
||||
PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT, PTN1_IN_PU),
|
||||
PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT, PTN0_IN_PU),
|
||||
PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
|
||||
PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
|
||||
PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
|
||||
PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
|
||||
PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
|
||||
PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
|
||||
PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
|
||||
PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
|
||||
|
||||
/* PTQ GPIO */
|
||||
PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT, PTQ7_IN_PU),
|
||||
PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT, PTQ6_IN_PU),
|
||||
PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT, PTQ5_IN_PU),
|
||||
PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT, PTQ4_IN_PU),
|
||||
PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT, PTQ3_IN_PU),
|
||||
PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT, PTQ2_IN_PU),
|
||||
PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT, PTQ1_IN_PU),
|
||||
PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT, PTQ0_IN_PU),
|
||||
PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT),
|
||||
PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
|
||||
PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
|
||||
PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
|
||||
PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
|
||||
PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
|
||||
PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
|
||||
PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
|
||||
|
||||
/* PTR GPIO */
|
||||
PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
|
||||
PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
|
||||
PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
|
||||
PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
|
||||
PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_IN_PU),
|
||||
PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
|
||||
PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
|
||||
PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
|
||||
PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
|
||||
PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
|
||||
PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
|
||||
PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
|
||||
PINMUX_DATA(PTR3_DATA, PTR3_IN),
|
||||
PINMUX_DATA(PTR2_DATA, PTR2_IN),
|
||||
PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
|
||||
PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
|
||||
|
||||
/* PTS GPIO */
|
||||
PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT, PTS6_IN_PU),
|
||||
PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT, PTS5_IN_PU),
|
||||
PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
|
||||
PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
|
||||
PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
|
||||
PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
|
||||
PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
|
||||
PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
|
||||
PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
|
||||
PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
|
||||
PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
|
||||
PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
|
||||
PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
|
||||
PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
|
||||
|
||||
/* PTT GPIO */
|
||||
PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT, PTT7_IN_PU),
|
||||
PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT, PTT6_IN_PU),
|
||||
PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT, PTT5_IN_PU),
|
||||
PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
|
||||
PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
|
||||
PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
|
||||
PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
|
||||
PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
|
||||
PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
|
||||
PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
|
||||
PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
|
||||
PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
|
||||
PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
|
||||
PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
|
||||
PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
|
||||
PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
|
||||
|
||||
/* PTU GPIO */
|
||||
PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT, PTU7_IN_PU),
|
||||
PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT, PTU6_IN_PU),
|
||||
PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT, PTU5_IN_PU),
|
||||
PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
|
||||
PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
|
||||
PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
|
||||
PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
|
||||
PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
|
||||
PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
|
||||
PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
|
||||
PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
|
||||
PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
|
||||
PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
|
||||
PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
|
||||
PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
|
||||
PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
|
||||
|
||||
/* PTV GPIO */
|
||||
PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT, PTV7_IN_PU),
|
||||
PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT, PTV6_IN_PU),
|
||||
PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT, PTV5_IN_PU),
|
||||
PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
|
||||
PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
|
||||
PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
|
||||
PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
|
||||
PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
|
||||
PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
|
||||
PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
|
||||
PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
|
||||
PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
|
||||
PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
|
||||
PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
|
||||
PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
|
||||
PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
|
||||
|
||||
/* PTW GPIO */
|
||||
PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT, PTW7_IN_PU),
|
||||
PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT, PTW6_IN_PU),
|
||||
PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT, PTW5_IN_PU),
|
||||
PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT, PTW4_IN_PU),
|
||||
PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT, PTW3_IN_PU),
|
||||
PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT, PTW2_IN_PU),
|
||||
PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT, PTW1_IN_PU),
|
||||
PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT, PTW0_IN_PU),
|
||||
PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
|
||||
PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
|
||||
PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
|
||||
PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
|
||||
PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
|
||||
PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
|
||||
PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
|
||||
PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
|
||||
|
||||
/* PTX GPIO */
|
||||
PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT, PTX7_IN_PU),
|
||||
PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT, PTX6_IN_PU),
|
||||
PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT, PTX5_IN_PU),
|
||||
PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT, PTX4_IN_PU),
|
||||
PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT, PTX3_IN_PU),
|
||||
PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT, PTX2_IN_PU),
|
||||
PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT, PTX1_IN_PU),
|
||||
PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT, PTX0_IN_PU),
|
||||
PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
|
||||
PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
|
||||
PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
|
||||
PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
|
||||
PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
|
||||
PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
|
||||
PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
|
||||
PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
|
||||
|
||||
/* PTY GPIO */
|
||||
PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT, PTY7_IN_PU),
|
||||
PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT, PTY6_IN_PU),
|
||||
PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT, PTY5_IN_PU),
|
||||
PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT, PTY4_IN_PU),
|
||||
PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT, PTY3_IN_PU),
|
||||
PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT, PTY2_IN_PU),
|
||||
PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT, PTY1_IN_PU),
|
||||
PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT, PTY0_IN_PU),
|
||||
PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
|
||||
PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
|
||||
PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
|
||||
PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
|
||||
PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
|
||||
PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
|
||||
PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
|
||||
PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
|
||||
|
||||
/* PTZ GPIO */
|
||||
PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT, PTZ7_IN_PU),
|
||||
PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT, PTZ6_IN_PU),
|
||||
PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT, PTZ5_IN_PU),
|
||||
PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT, PTZ4_IN_PU),
|
||||
PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT, PTZ3_IN_PU),
|
||||
PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT, PTZ2_IN_PU),
|
||||
PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT, PTZ1_IN_PU),
|
||||
PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT, PTZ0_IN_PU),
|
||||
PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
|
||||
PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
|
||||
PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
|
||||
PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
|
||||
PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
|
||||
PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
|
||||
PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
|
||||
PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
|
||||
|
||||
/* PTA FN */
|
||||
PINMUX_DATA(D23_MARK, PSA15_0, PSA14_0, PTA7_FN),
|
||||
|
|
@ -1789,64 +1743,64 @@ static const struct pinmux_func pinmux_func_gpios[] = {
|
|||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
|
||||
PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
|
||||
PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
|
||||
PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
|
||||
PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
|
||||
PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
|
||||
PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
|
||||
PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
|
||||
PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
|
||||
PTA7_FN, PTA7_OUT, 0, PTA7_IN,
|
||||
PTA6_FN, PTA6_OUT, 0, PTA6_IN,
|
||||
PTA5_FN, PTA5_OUT, 0, PTA5_IN,
|
||||
PTA4_FN, PTA4_OUT, 0, PTA4_IN,
|
||||
PTA3_FN, PTA3_OUT, 0, PTA3_IN,
|
||||
PTA2_FN, PTA2_OUT, 0, PTA2_IN,
|
||||
PTA1_FN, PTA1_OUT, 0, PTA1_IN,
|
||||
PTA0_FN, PTA0_OUT, 0, PTA0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
|
||||
PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
|
||||
PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
|
||||
PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
|
||||
PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
|
||||
PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
|
||||
PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
|
||||
PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
|
||||
PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
|
||||
PTB7_FN, PTB7_OUT, 0, PTB7_IN,
|
||||
PTB6_FN, PTB6_OUT, 0, PTB6_IN,
|
||||
PTB5_FN, PTB5_OUT, 0, PTB5_IN,
|
||||
PTB4_FN, PTB4_OUT, 0, PTB4_IN,
|
||||
PTB3_FN, PTB3_OUT, 0, PTB3_IN,
|
||||
PTB2_FN, PTB2_OUT, 0, PTB2_IN,
|
||||
PTB1_FN, PTB1_OUT, 0, PTB1_IN,
|
||||
PTB0_FN, PTB0_OUT, 0, PTB0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
|
||||
PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
|
||||
PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
|
||||
PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
|
||||
PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
|
||||
PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
|
||||
PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
|
||||
PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
|
||||
PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
|
||||
PTC7_FN, PTC7_OUT, 0, PTC7_IN,
|
||||
PTC6_FN, PTC6_OUT, 0, PTC6_IN,
|
||||
PTC5_FN, PTC5_OUT, 0, PTC5_IN,
|
||||
PTC4_FN, PTC4_OUT, 0, PTC4_IN,
|
||||
PTC3_FN, PTC3_OUT, 0, PTC3_IN,
|
||||
PTC2_FN, PTC2_OUT, 0, PTC2_IN,
|
||||
PTC1_FN, PTC1_OUT, 0, PTC1_IN,
|
||||
PTC0_FN, PTC0_OUT, 0, PTC0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
|
||||
PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
|
||||
PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
|
||||
PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
|
||||
PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
|
||||
PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
|
||||
PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
|
||||
PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
|
||||
PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
|
||||
PTD7_FN, PTD7_OUT, 0, PTD7_IN,
|
||||
PTD6_FN, PTD6_OUT, 0, PTD6_IN,
|
||||
PTD5_FN, PTD5_OUT, 0, PTD5_IN,
|
||||
PTD4_FN, PTD4_OUT, 0, PTD4_IN,
|
||||
PTD3_FN, PTD3_OUT, 0, PTD3_IN,
|
||||
PTD2_FN, PTD2_OUT, 0, PTD2_IN,
|
||||
PTD1_FN, PTD1_OUT, 0, PTD1_IN,
|
||||
PTD0_FN, PTD0_OUT, 0, PTD0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
|
||||
PTE7_FN, PTE7_OUT, PTE7_IN_PU, PTE7_IN,
|
||||
PTE6_FN, PTE6_OUT, PTE6_IN_PU, PTE6_IN,
|
||||
PTE5_FN, PTE5_OUT, PTE5_IN_PU, PTE5_IN,
|
||||
PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
|
||||
PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
|
||||
PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
|
||||
PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
|
||||
PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
|
||||
PTE7_FN, PTE7_OUT, 0, PTE7_IN,
|
||||
PTE6_FN, PTE6_OUT, 0, PTE6_IN,
|
||||
PTE5_FN, PTE5_OUT, 0, PTE5_IN,
|
||||
PTE4_FN, PTE4_OUT, 0, PTE4_IN,
|
||||
PTE3_FN, PTE3_OUT, 0, PTE3_IN,
|
||||
PTE2_FN, PTE2_OUT, 0, PTE2_IN,
|
||||
PTE1_FN, PTE1_OUT, 0, PTE1_IN,
|
||||
PTE0_FN, PTE0_OUT, 0, PTE0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
|
||||
PTF7_FN, PTF7_OUT, PTF7_IN_PU, PTF7_IN,
|
||||
PTF6_FN, PTF6_OUT, PTF6_IN_PU, PTF6_IN,
|
||||
PTF5_FN, PTF5_OUT, PTF5_IN_PU, PTF5_IN,
|
||||
PTF4_FN, PTF4_OUT, PTF4_IN_PU, PTF4_IN,
|
||||
PTF3_FN, PTF3_OUT, PTF3_IN_PU, PTF3_IN,
|
||||
PTF2_FN, PTF2_OUT, PTF2_IN_PU, PTF2_IN,
|
||||
PTF1_FN, PTF1_OUT, PTF1_IN_PU, PTF1_IN,
|
||||
PTF0_FN, PTF0_OUT, PTF0_IN_PU, PTF0_IN }
|
||||
PTF7_FN, PTF7_OUT, 0, PTF7_IN,
|
||||
PTF6_FN, PTF6_OUT, 0, PTF6_IN,
|
||||
PTF5_FN, PTF5_OUT, 0, PTF5_IN,
|
||||
PTF4_FN, PTF4_OUT, 0, PTF4_IN,
|
||||
PTF3_FN, PTF3_OUT, 0, PTF3_IN,
|
||||
PTF2_FN, PTF2_OUT, 0, PTF2_IN,
|
||||
PTF1_FN, PTF1_OUT, 0, PTF1_IN,
|
||||
PTF0_FN, PTF0_OUT, 0, PTF0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
|
|
@ -1859,164 +1813,164 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
|||
PTG0_FN, PTG0_OUT, 0, 0 }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
|
||||
PTH7_FN, PTH7_OUT, PTH7_IN_PU, PTH7_IN,
|
||||
PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
|
||||
PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
|
||||
PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
|
||||
PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
|
||||
PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
|
||||
PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
|
||||
PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
|
||||
PTH7_FN, PTH7_OUT, 0, PTH7_IN,
|
||||
PTH6_FN, PTH6_OUT, 0, PTH6_IN,
|
||||
PTH5_FN, PTH5_OUT, 0, PTH5_IN,
|
||||
PTH4_FN, PTH4_OUT, 0, PTH4_IN,
|
||||
PTH3_FN, PTH3_OUT, 0, PTH3_IN,
|
||||
PTH2_FN, PTH2_OUT, 0, PTH2_IN,
|
||||
PTH1_FN, PTH1_OUT, 0, PTH1_IN,
|
||||
PTH0_FN, PTH0_OUT, 0, PTH0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
|
||||
PTJ7_FN, PTJ7_OUT, 0, 0,
|
||||
PTJ6_FN, PTJ6_OUT, 0, 0,
|
||||
PTJ5_FN, PTJ5_OUT, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
|
||||
PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
|
||||
PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
|
||||
PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
|
||||
PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
|
||||
PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
|
||||
PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
|
||||
PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
|
||||
PTK7_FN, PTK7_OUT, PTK7_IN_PU, PTK7_IN,
|
||||
PTK6_FN, PTK6_OUT, PTK6_IN_PU, PTK6_IN,
|
||||
PTK5_FN, PTK5_OUT, PTK5_IN_PU, PTK5_IN,
|
||||
PTK4_FN, PTK4_OUT, PTK4_IN_PU, PTK4_IN,
|
||||
PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
|
||||
PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
|
||||
PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
|
||||
PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
|
||||
PTK7_FN, PTK7_OUT, 0, PTK7_IN,
|
||||
PTK6_FN, PTK6_OUT, 0, PTK6_IN,
|
||||
PTK5_FN, PTK5_OUT, 0, PTK5_IN,
|
||||
PTK4_FN, PTK4_OUT, 0, PTK4_IN,
|
||||
PTK3_FN, PTK3_OUT, 0, PTK3_IN,
|
||||
PTK2_FN, PTK2_OUT, 0, PTK2_IN,
|
||||
PTK1_FN, PTK1_OUT, 0, PTK1_IN,
|
||||
PTK0_FN, PTK0_OUT, 0, PTK0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
|
||||
PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
|
||||
PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
|
||||
PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
|
||||
PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
|
||||
PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
|
||||
PTL2_FN, PTL2_OUT, PTL2_IN_PU, PTL2_IN,
|
||||
PTL1_FN, PTL1_OUT, PTL1_IN_PU, PTL1_IN,
|
||||
PTL0_FN, PTL0_OUT, PTL0_IN_PU, PTL0_IN }
|
||||
PTL7_FN, PTL7_OUT, 0, PTL7_IN,
|
||||
PTL6_FN, PTL6_OUT, 0, PTL6_IN,
|
||||
PTL5_FN, PTL5_OUT, 0, PTL5_IN,
|
||||
PTL4_FN, PTL4_OUT, 0, PTL4_IN,
|
||||
PTL3_FN, PTL3_OUT, 0, PTL3_IN,
|
||||
PTL2_FN, PTL2_OUT, 0, PTL2_IN,
|
||||
PTL1_FN, PTL1_OUT, 0, PTL1_IN,
|
||||
PTL0_FN, PTL0_OUT, 0, PTL0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
|
||||
PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
|
||||
PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
|
||||
PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
|
||||
PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
|
||||
PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
|
||||
PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
|
||||
PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
|
||||
PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
|
||||
PTM7_FN, PTM7_OUT, 0, PTM7_IN,
|
||||
PTM6_FN, PTM6_OUT, 0, PTM6_IN,
|
||||
PTM5_FN, PTM5_OUT, 0, PTM5_IN,
|
||||
PTM4_FN, PTM4_OUT, 0, PTM4_IN,
|
||||
PTM3_FN, PTM3_OUT, 0, PTM3_IN,
|
||||
PTM2_FN, PTM2_OUT, 0, PTM2_IN,
|
||||
PTM1_FN, PTM1_OUT, 0, PTM1_IN,
|
||||
PTM0_FN, PTM0_OUT, 0, PTM0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
|
||||
PTN7_FN, PTN7_OUT, PTN7_IN_PU, PTN7_IN,
|
||||
PTN6_FN, PTN6_OUT, PTN6_IN_PU, PTN6_IN,
|
||||
PTN5_FN, PTN5_OUT, PTN5_IN_PU, PTN5_IN,
|
||||
PTN4_FN, PTN4_OUT, PTN4_IN_PU, PTN4_IN,
|
||||
PTN3_FN, PTN3_OUT, PTN3_IN_PU, PTN3_IN,
|
||||
PTN2_FN, PTN2_OUT, PTN2_IN_PU, PTN2_IN,
|
||||
PTN1_FN, PTN1_OUT, PTN1_IN_PU, PTN1_IN,
|
||||
PTN0_FN, PTN0_OUT, PTN0_IN_PU, PTN0_IN }
|
||||
PTN7_FN, PTN7_OUT, 0, PTN7_IN,
|
||||
PTN6_FN, PTN6_OUT, 0, PTN6_IN,
|
||||
PTN5_FN, PTN5_OUT, 0, PTN5_IN,
|
||||
PTN4_FN, PTN4_OUT, 0, PTN4_IN,
|
||||
PTN3_FN, PTN3_OUT, 0, PTN3_IN,
|
||||
PTN2_FN, PTN2_OUT, 0, PTN2_IN,
|
||||
PTN1_FN, PTN1_OUT, 0, PTN1_IN,
|
||||
PTN0_FN, PTN0_OUT, 0, PTN0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
|
||||
PTQ7_FN, PTQ7_OUT, PTQ7_IN_PU, PTQ7_IN,
|
||||
PTQ6_FN, PTQ6_OUT, PTQ6_IN_PU, PTQ6_IN,
|
||||
PTQ5_FN, PTQ5_OUT, PTQ5_IN_PU, PTQ5_IN,
|
||||
PTQ4_FN, PTQ4_OUT, PTQ4_IN_PU, PTQ4_IN,
|
||||
PTQ3_FN, PTQ3_OUT, PTQ3_IN_PU, PTQ3_IN,
|
||||
PTQ2_FN, PTQ2_OUT, PTQ2_IN_PU, PTQ2_IN,
|
||||
PTQ1_FN, PTQ1_OUT, PTQ1_IN_PU, PTQ1_IN,
|
||||
PTQ0_FN, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
|
||||
PTQ7_FN, PTQ7_OUT, 0, PTQ7_IN,
|
||||
PTQ6_FN, PTQ6_OUT, 0, PTQ6_IN,
|
||||
PTQ5_FN, PTQ5_OUT, 0, PTQ5_IN,
|
||||
PTQ4_FN, PTQ4_OUT, 0, PTQ4_IN,
|
||||
PTQ3_FN, PTQ3_OUT, 0, PTQ3_IN,
|
||||
PTQ2_FN, PTQ2_OUT, 0, PTQ2_IN,
|
||||
PTQ1_FN, PTQ1_OUT, 0, PTQ1_IN,
|
||||
PTQ0_FN, PTQ0_OUT, 0, PTQ0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
|
||||
PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
|
||||
PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
|
||||
PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
|
||||
PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
|
||||
PTR3_FN, 0, PTR3_IN_PU, PTR3_IN,
|
||||
PTR2_FN, 0, PTR2_IN_PU, PTR2_IN,
|
||||
PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
|
||||
PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
|
||||
PTR7_FN, PTR7_OUT, 0, PTR7_IN,
|
||||
PTR6_FN, PTR6_OUT, 0, PTR6_IN,
|
||||
PTR5_FN, PTR5_OUT, 0, PTR5_IN,
|
||||
PTR4_FN, PTR4_OUT, 0, PTR4_IN,
|
||||
PTR3_FN, 0, 0, PTR3_IN,
|
||||
PTR2_FN, 0, 0, PTR2_IN,
|
||||
PTR1_FN, PTR1_OUT, 0, PTR1_IN,
|
||||
PTR0_FN, PTR0_OUT, 0, PTR0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
PTS6_FN, PTS6_OUT, PTS6_IN_PU, PTS6_IN,
|
||||
PTS5_FN, PTS5_OUT, PTS5_IN_PU, PTS5_IN,
|
||||
PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
|
||||
PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
|
||||
PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
|
||||
PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
|
||||
PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
|
||||
PTS6_FN, PTS6_OUT, 0, PTS6_IN,
|
||||
PTS5_FN, PTS5_OUT, 0, PTS5_IN,
|
||||
PTS4_FN, PTS4_OUT, 0, PTS4_IN,
|
||||
PTS3_FN, PTS3_OUT, 0, PTS3_IN,
|
||||
PTS2_FN, PTS2_OUT, 0, PTS2_IN,
|
||||
PTS1_FN, PTS1_OUT, 0, PTS1_IN,
|
||||
PTS0_FN, PTS0_OUT, 0, PTS0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
|
||||
PTT7_FN, PTT7_OUT, PTT7_IN_PU, PTT7_IN,
|
||||
PTT6_FN, PTT6_OUT, PTT6_IN_PU, PTT6_IN,
|
||||
PTT5_FN, PTT5_OUT, PTT5_IN_PU, PTT5_IN,
|
||||
PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
|
||||
PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
|
||||
PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
|
||||
PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
|
||||
PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
|
||||
PTT7_FN, PTT7_OUT, 0, PTT7_IN,
|
||||
PTT6_FN, PTT6_OUT, 0, PTT6_IN,
|
||||
PTT5_FN, PTT5_OUT, 0, PTT5_IN,
|
||||
PTT4_FN, PTT4_OUT, 0, PTT4_IN,
|
||||
PTT3_FN, PTT3_OUT, 0, PTT3_IN,
|
||||
PTT2_FN, PTT2_OUT, 0, PTT2_IN,
|
||||
PTT1_FN, PTT1_OUT, 0, PTT1_IN,
|
||||
PTT0_FN, PTT0_OUT, 0, PTT0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
|
||||
PTU7_FN, PTU7_OUT, PTU7_IN_PU, PTU7_IN,
|
||||
PTU6_FN, PTU6_OUT, PTU6_IN_PU, PTU6_IN,
|
||||
PTU5_FN, PTU5_OUT, PTU5_IN_PU, PTU5_IN,
|
||||
PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
|
||||
PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
|
||||
PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
|
||||
PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
|
||||
PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
|
||||
PTU7_FN, PTU7_OUT, 0, PTU7_IN,
|
||||
PTU6_FN, PTU6_OUT, 0, PTU6_IN,
|
||||
PTU5_FN, PTU5_OUT, 0, PTU5_IN,
|
||||
PTU4_FN, PTU4_OUT, 0, PTU4_IN,
|
||||
PTU3_FN, PTU3_OUT, 0, PTU3_IN,
|
||||
PTU2_FN, PTU2_OUT, 0, PTU2_IN,
|
||||
PTU1_FN, PTU1_OUT, 0, PTU1_IN,
|
||||
PTU0_FN, PTU0_OUT, 0, PTU0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
|
||||
PTV7_FN, PTV7_OUT, PTV7_IN_PU, PTV7_IN,
|
||||
PTV6_FN, PTV6_OUT, PTV6_IN_PU, PTV6_IN,
|
||||
PTV5_FN, PTV5_OUT, PTV5_IN_PU, PTV5_IN,
|
||||
PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
|
||||
PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
|
||||
PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
|
||||
PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
|
||||
PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
|
||||
PTV7_FN, PTV7_OUT, 0, PTV7_IN,
|
||||
PTV6_FN, PTV6_OUT, 0, PTV6_IN,
|
||||
PTV5_FN, PTV5_OUT, 0, PTV5_IN,
|
||||
PTV4_FN, PTV4_OUT, 0, PTV4_IN,
|
||||
PTV3_FN, PTV3_OUT, 0, PTV3_IN,
|
||||
PTV2_FN, PTV2_OUT, 0, PTV2_IN,
|
||||
PTV1_FN, PTV1_OUT, 0, PTV1_IN,
|
||||
PTV0_FN, PTV0_OUT, 0, PTV0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
|
||||
PTW7_FN, PTW7_OUT, PTW7_IN_PU, PTW7_IN,
|
||||
PTW6_FN, PTW6_OUT, PTW6_IN_PU, PTW6_IN,
|
||||
PTW5_FN, PTW5_OUT, PTW5_IN_PU, PTW5_IN,
|
||||
PTW4_FN, PTW4_OUT, PTW4_IN_PU, PTW4_IN,
|
||||
PTW3_FN, PTW3_OUT, PTW3_IN_PU, PTW3_IN,
|
||||
PTW2_FN, PTW2_OUT, PTW2_IN_PU, PTW2_IN,
|
||||
PTW1_FN, PTW1_OUT, PTW1_IN_PU, PTW1_IN,
|
||||
PTW0_FN, PTW0_OUT, PTW0_IN_PU, PTW0_IN }
|
||||
PTW7_FN, PTW7_OUT, 0, PTW7_IN,
|
||||
PTW6_FN, PTW6_OUT, 0, PTW6_IN,
|
||||
PTW5_FN, PTW5_OUT, 0, PTW5_IN,
|
||||
PTW4_FN, PTW4_OUT, 0, PTW4_IN,
|
||||
PTW3_FN, PTW3_OUT, 0, PTW3_IN,
|
||||
PTW2_FN, PTW2_OUT, 0, PTW2_IN,
|
||||
PTW1_FN, PTW1_OUT, 0, PTW1_IN,
|
||||
PTW0_FN, PTW0_OUT, 0, PTW0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
|
||||
PTX7_FN, PTX7_OUT, PTX7_IN_PU, PTX7_IN,
|
||||
PTX6_FN, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
|
||||
PTX5_FN, PTX5_OUT, PTX5_IN_PU, PTX5_IN,
|
||||
PTX4_FN, PTX4_OUT, PTX4_IN_PU, PTX4_IN,
|
||||
PTX3_FN, PTX3_OUT, PTX3_IN_PU, PTX3_IN,
|
||||
PTX2_FN, PTX2_OUT, PTX2_IN_PU, PTX2_IN,
|
||||
PTX1_FN, PTX1_OUT, PTX1_IN_PU, PTX1_IN,
|
||||
PTX0_FN, PTX0_OUT, PTX0_IN_PU, PTX0_IN }
|
||||
PTX7_FN, PTX7_OUT, 0, PTX7_IN,
|
||||
PTX6_FN, PTX6_OUT, 0, PTX6_IN,
|
||||
PTX5_FN, PTX5_OUT, 0, PTX5_IN,
|
||||
PTX4_FN, PTX4_OUT, 0, PTX4_IN,
|
||||
PTX3_FN, PTX3_OUT, 0, PTX3_IN,
|
||||
PTX2_FN, PTX2_OUT, 0, PTX2_IN,
|
||||
PTX1_FN, PTX1_OUT, 0, PTX1_IN,
|
||||
PTX0_FN, PTX0_OUT, 0, PTX0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
|
||||
PTY7_FN, PTY7_OUT, PTY7_IN_PU, PTY7_IN,
|
||||
PTY6_FN, PTY6_OUT, PTY6_IN_PU, PTY6_IN,
|
||||
PTY5_FN, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
|
||||
PTY4_FN, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
|
||||
PTY3_FN, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
|
||||
PTY2_FN, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
|
||||
PTY1_FN, PTY1_OUT, PTY1_IN_PU, PTY1_IN,
|
||||
PTY0_FN, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
|
||||
PTY7_FN, PTY7_OUT, 0, PTY7_IN,
|
||||
PTY6_FN, PTY6_OUT, 0, PTY6_IN,
|
||||
PTY5_FN, PTY5_OUT, 0, PTY5_IN,
|
||||
PTY4_FN, PTY4_OUT, 0, PTY4_IN,
|
||||
PTY3_FN, PTY3_OUT, 0, PTY3_IN,
|
||||
PTY2_FN, PTY2_OUT, 0, PTY2_IN,
|
||||
PTY1_FN, PTY1_OUT, 0, PTY1_IN,
|
||||
PTY0_FN, PTY0_OUT, 0, PTY0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
|
||||
PTZ7_FN, PTZ7_OUT, PTZ7_IN_PU, PTZ7_IN,
|
||||
PTZ6_FN, PTZ6_OUT, PTZ6_IN_PU, PTZ6_IN,
|
||||
PTZ5_FN, PTZ5_OUT, PTZ5_IN_PU, PTZ5_IN,
|
||||
PTZ4_FN, PTZ4_OUT, PTZ4_IN_PU, PTZ4_IN,
|
||||
PTZ3_FN, PTZ3_OUT, PTZ3_IN_PU, PTZ3_IN,
|
||||
PTZ2_FN, PTZ2_OUT, PTZ2_IN_PU, PTZ2_IN,
|
||||
PTZ1_FN, PTZ1_OUT, PTZ1_IN_PU, PTZ1_IN,
|
||||
PTZ0_FN, PTZ0_OUT, PTZ0_IN_PU, PTZ0_IN }
|
||||
PTZ7_FN, PTZ7_OUT, 0, PTZ7_IN,
|
||||
PTZ6_FN, PTZ6_OUT, 0, PTZ6_IN,
|
||||
PTZ5_FN, PTZ5_OUT, 0, PTZ5_IN,
|
||||
PTZ4_FN, PTZ4_OUT, 0, PTZ4_IN,
|
||||
PTZ3_FN, PTZ3_OUT, 0, PTZ3_IN,
|
||||
PTZ2_FN, PTZ2_OUT, 0, PTZ2_IN,
|
||||
PTZ1_FN, PTZ1_OUT, 0, PTZ1_IN,
|
||||
PTZ0_FN, PTZ0_OUT, 0, PTZ0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
|
||||
PSA15_0, PSA15_1,
|
||||
|
|
@ -2210,7 +2164,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
|
|||
const struct sh_pfc_soc_info sh7724_pinmux_info = {
|
||||
.name = "sh7724_pfc",
|
||||
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
|
||||
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
|
||||
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
|
||||
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue