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clk: qcom: HDMI source sel is 3 not 2 

The HDMI PLL input to the tv mux is supposed to be 3, not 2. Fix
the code so that we can properly select the HDMI PLL.

Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)"
Reported-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
hifive-unleashed-5.1
Stephen Boyd 2014-06-25 14:44:19 -07:00 committed by Mike Turquette
parent 4924b8a2fa
commit c556bcddc7
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/qcom/mmcc-msm8960.c
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@ -1209,7 +1209,7 @@ static struct clk_branch rot_clk = {
static u8 mmcc_pxo_hdmi_map[] = {
[P_PXO] = 0,
[P_HDMI_PLL] = 2,
[P_HDMI_PLL] = 3,
};
static const char *mmcc_pxo_hdmi[] = {