mlx4_core: Pass cache line size to device FW
ConnectX can work more efficiently if the CPU cache line size is passed to it with the INIT_HCA firmware command. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -33,6 +33,7 @@
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*/
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#include <linux/mlx4/cmd.h>
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#include <linux/cache.h>
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#include "fw.h"
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#include "icm.h"
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@ -698,6 +699,7 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
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#define INIT_HCA_IN_SIZE 0x200
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#define INIT_HCA_VERSION_OFFSET 0x000
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#define INIT_HCA_VERSION 2
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#define INIT_HCA_CACHELINE_SZ_OFFSET 0x0e
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#define INIT_HCA_FLAGS_OFFSET 0x014
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#define INIT_HCA_QPC_OFFSET 0x020
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#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10)
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@ -735,6 +737,9 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
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*((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION;
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*((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) =
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(ilog2(cache_line_size()) - 4) << 5;
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#if defined(__LITTLE_ENDIAN)
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*(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1);
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#elif defined(__BIG_ENDIAN)
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