ath9k: Remove pcieSerDesWrite
This HW config option is always set to true and is not needed. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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28148db74d
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c6fc7e64e1
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@ -754,6 +754,9 @@ static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah)
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static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
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static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
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bool power_off)
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bool power_off)
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{
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{
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unsigned int i;
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struct ar5416IniArray *array;
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/*
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/*
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* Increase L1 Entry Latency. Some WB222 boards don't have
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* Increase L1 Entry Latency. Some WB222 boards don't have
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* this change in eeprom/OTP.
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* this change in eeprom/OTP.
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@ -779,18 +782,13 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
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* Configire PCIE after Ini init. SERDES values now come from ini file
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* Configire PCIE after Ini init. SERDES values now come from ini file
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* This enables PCIe low power mode.
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* This enables PCIe low power mode.
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*/
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*/
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if (ah->config.pcieSerDesWrite) {
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array = power_off ? &ah->iniPcieSerdes :
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unsigned int i;
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&ah->iniPcieSerdesLowPower;
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struct ar5416IniArray *array;
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array = power_off ? &ah->iniPcieSerdes :
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for (i = 0; i < array->ia_rows; i++) {
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&ah->iniPcieSerdesLowPower;
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REG_WRITE(ah,
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INI_RA(array, i, 0),
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for (i = 0; i < array->ia_rows; i++) {
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INI_RA(array, i, 1));
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REG_WRITE(ah,
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INI_RA(array, i, 0),
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INI_RA(array, i, 1));
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}
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}
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}
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}
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}
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@ -454,7 +454,6 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
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}
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}
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ah->config.rx_intr_mitigation = true;
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ah->config.rx_intr_mitigation = true;
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ah->config.pcieSerDesWrite = true;
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/*
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/*
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* We need this for PCI devices only (Cardbus, PCI, miniPCI)
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* We need this for PCI devices only (Cardbus, PCI, miniPCI)
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@ -283,7 +283,6 @@ struct ath9k_ops_config {
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int additional_swba_backoff;
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int additional_swba_backoff;
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int ack_6mb;
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int ack_6mb;
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u32 cwm_ignore_extcca;
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u32 cwm_ignore_extcca;
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bool pcieSerDesWrite;
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u8 pcie_clock_req;
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u8 pcie_clock_req;
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u32 pcie_waen;
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u32 pcie_waen;
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u8 analog_shiftreg;
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u8 analog_shiftreg;
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