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regulator: tps51632: Fix setting ramp delay 

According to the datasheet:

SLEW Register(Address = 07h)
b7      b6      b5      b4      b3      b2      b1      b0
48mV/us 42mV/us 36mV/us 30mV/us 24mV/us 18mV/us 12mV/us 6mV/us

Current code does not set correct slew rate in some cases:
e.g. Assume ramp_delay is 10000, current code sets slew register to 6mV/us.
Fix the logic to set slew register.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
hifive-unleashed-5.1
Axel Lin 2016-05-31 17:26:00 +08:00 committed by Mark Brown
parent 1a695a905c
commit c714a588fc
1 changed files with 6 additions and 3 deletions
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9
drivers/regulator/tps51632-regulator.c
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@ -94,11 +94,14 @@ static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
int ramp_delay)
{
struct tps51632_chip *tps = rdev_get_drvdata(rdev);
int bit = ramp_delay/6000;
int bit;
int ret;
if (bit)
bit--;
if (ramp_delay == 0)
bit = 0;
else
bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;
ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
if (ret < 0)
dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);