From 1ee9530a71686436dbeb5f31dd5b925c39cf71d7 Mon Sep 17 00:00:00 2001 From: Lothar Wassmann Date: Mon, 12 Dec 2005 16:44:05 +0000 Subject: [PATCH 1/2] [ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly enabling MBREQ (replaces: 3198/1) Patch from Lothar Wassmann The patch makes sure, that the ouptut functions of pins are restored before restoring the Alternat Function settings, preventing pins from being intermediately configured for undefined or unwanted alternate functions. Here is the original comment: I've got a PXA270 system that uses GPIO80 as nCS4. This system did hang on resume. Digging into the problem I found that the processor stalled immediately when restoring the GAFR2_U register which restored the alternate function for GPIO80. Since the GPDR registers were restored after the GAFR registers, the offending GPIO was configured as input at this point. Thus the alternate function that was in effect after restoring the GAFR was in fact the input function "MBREQ" instead of the output function "nCS4". The "PXA27x Processor Family Developer's Manual" (Footnote in Table 6-1 on page 6-3) states that: "The MBREQ alternate function must not be enabled until the PSSR[RDH] bit field is cleared. For more details, see Table 3-15, "PSSR Bit Definitions" on page 3-71." There is another note in the Developer's Manual (chapter 24.4.2 "GPIO operation as Alternate Function" on page 24-4) stating that: "Configuring a GPIO for an alternate function that is not defined for it causes unpredictable results." Since some GPIOs have no input function defined, and to prevent inadvertedly programming the MBREQ function on some pin, the GAFR registers should be restored after the GPDR registers have been restored. Additional provisions have to be made when the MBREQ function is actually required. The corresponding GAFR bits should not be restored with the regular GAFR restore, but must be set only after the PSSR bits have been cleared. Signed-off-by: Lothar Wassmann Signed-off-by: Russell King --- arch/arm/mach-pxa/pm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index f74b9af112dc..852ea72d8c80 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -155,19 +155,20 @@ int pxa_pm_enter(suspend_state_t state) PSPR = 0; /* restore registers */ + RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); + RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GAFR0_L); RESTORE(GAFR0_U); RESTORE(GAFR1_L); RESTORE(GAFR1_U); RESTORE(GAFR2_L); RESTORE(GAFR2_U); - RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2); - RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); #ifdef CONFIG_PXA27x RESTORE(MDREFR); - RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3); - RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); + RESTORE_GPLEVEL(3); RESTORE(GPDR3); + RESTORE(GAFR3_L); RESTORE(GAFR3_U); + RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3); RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); RESTORE(PFER); RESTORE(PKWR); #endif From c2e2611425a956d25d2948c5d95d3848c4db1257 Mon Sep 17 00:00:00 2001 From: Daniel Jacobowitz Date: Wed, 14 Dec 2005 22:04:22 +0000 Subject: [PATCH 2/2] [ARM] 3205/1: Handle new EABI relocations when loading kernel modules. Patch from Daniel Jacobowitz Handle new EABI relocations when loading kernel modules. This is necessary for CONFIG_AEABI kernels, and also for some broken (since fixed) old ABI toolchains. Signed-off-by: Daniel Jacobowitz Signed-off-by: Russell King --- arch/arm/kernel/module.c | 2 ++ include/asm-arm/elf.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 6055e1427ba3..055bf5d28894 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -101,6 +101,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, break; case R_ARM_PC24: + case R_ARM_CALL: + case R_ARM_JUMP24: offset = (*(u32 *)loc & 0x00ffffff) << 2; if (offset & 0x02000000) offset -= 0x04000000; diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 7da97a937548..2d44b42d1847 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -22,6 +22,8 @@ typedef unsigned long elf_freg_t[3]; #define R_ARM_NONE 0 #define R_ARM_PC24 1 #define R_ARM_ABS32 2 +#define R_ARM_CALL 28 +#define R_ARM_JUMP24 29 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) typedef elf_greg_t elf_gregset_t[ELF_NGREG];