xen: event channel arrays are xen_ulong_t and not unsigned long
On ARM we want these to be the same size on 32- and 64-bit. This is an ABI change on ARM. X86 does not change. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Keir (Xen.org) <keir@xen.org> Cc: Tim Deegan <tim@xen.org> Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Cc: linux-arm-kernel@lists.infradead.org Cc: xen-devel@lists.xen.org Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
This commit is contained in:
parent
76eaca031f
commit
c81611c4e9
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@ -15,4 +15,26 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
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return raw_irqs_disabled_flags(regs->ARM_cpsr);
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}
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/*
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* We cannot use xchg because it does not support 8-byte
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* values. However it is safe to use {ldr,dtd}exd directly because all
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* platforms which Xen can run on support those instructions.
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*/
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static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val)
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{
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xen_ulong_t oldval;
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unsigned int tmp;
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wmb();
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asm volatile("@ xchg_xen_ulong\n"
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"1: ldrexd %0, %H0, [%3]\n"
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" strexd %1, %2, %H2, [%3]\n"
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" teq %1, #0\n"
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" bne 1b"
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: "=&r" (oldval), "=&r" (tmp)
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: "r" (val), "r" (ptr)
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: "memory", "cc");
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return oldval;
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}
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#endif /* _ASM_ARM_XEN_EVENTS_H */
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@ -16,4 +16,7 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
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return raw_irqs_disabled_flags(regs->flags);
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}
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/* No need for a barrier -- XCHG is a barrier on x86. */
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#define xchg_xen_ulong(ptr, val) xchg((ptr), (val))
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#endif /* _ASM_X86_XEN_EVENTS_H */
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@ -120,7 +120,22 @@ static unsigned long *pirq_eoi_map;
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#endif
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static bool (*pirq_needs_eoi)(unsigned irq);
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static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
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/*
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* Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
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* careful to only use bitops which allow for this (e.g
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* test_bit/find_first_bit and friends but not __ffs) and to pass
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* BITS_PER_EVTCHN_WORD as the bitmask length.
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*/
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#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
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/*
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* Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
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* array. Primarily to avoid long lines (hence the terse name).
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*/
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#define BM(x) (unsigned long *)(x)
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/* Find the first set bit in a evtchn mask */
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#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
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static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
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cpu_evtchn_mask);
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/* Xen will never allocate port zero for any purpose. */
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@ -294,9 +309,9 @@ static bool pirq_needs_eoi_flag(unsigned irq)
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return info->u.pirq.flags & PIRQ_NEEDS_EOI;
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}
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static inline unsigned long active_evtchns(unsigned int cpu,
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struct shared_info *sh,
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unsigned int idx)
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static inline xen_ulong_t active_evtchns(unsigned int cpu,
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struct shared_info *sh,
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unsigned int idx)
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{
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return sh->evtchn_pending[idx] &
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per_cpu(cpu_evtchn_mask, cpu)[idx] &
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@ -312,8 +327,8 @@ static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
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cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
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#endif
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clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
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set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
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clear_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu_from_irq(irq))));
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set_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu)));
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info_for_irq(irq)->cpu = cpu;
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}
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@ -339,19 +354,19 @@ static void init_evtchn_cpu_bindings(void)
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static inline void clear_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_clear_bit(port, &s->evtchn_pending[0]);
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sync_clear_bit(port, BM(&s->evtchn_pending[0]));
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}
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static inline void set_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, &s->evtchn_pending[0]);
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sync_set_bit(port, BM(&s->evtchn_pending[0]));
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}
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static inline int test_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_bit(port, &s->evtchn_pending[0]);
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return sync_test_bit(port, BM(&s->evtchn_pending[0]));
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}
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@ -375,7 +390,7 @@ EXPORT_SYMBOL_GPL(notify_remote_via_irq);
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static void mask_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, &s->evtchn_mask[0]);
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sync_set_bit(port, BM(&s->evtchn_mask[0]));
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}
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static void unmask_evtchn(int port)
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@ -389,7 +404,7 @@ static void unmask_evtchn(int port)
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if (unlikely((cpu != cpu_from_evtchn(port))))
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do_hypercall = 1;
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else
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evtchn_pending = sync_test_bit(port, &s->evtchn_pending[0]);
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evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
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if (unlikely(evtchn_pending && xen_hvm_domain()))
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do_hypercall = 1;
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@ -403,7 +418,7 @@ static void unmask_evtchn(int port)
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} else {
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struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
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sync_clear_bit(port, &s->evtchn_mask[0]);
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sync_clear_bit(port, BM(&s->evtchn_mask[0]));
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/*
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* The following is basically the equivalent of
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@ -411,8 +426,8 @@ static void unmask_evtchn(int port)
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* the interrupt edge' if the channel is masked.
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*/
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if (evtchn_pending &&
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!sync_test_and_set_bit(port / BITS_PER_LONG,
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&vcpu_info->evtchn_pending_sel))
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!sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
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BM(&vcpu_info->evtchn_pending_sel)))
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vcpu_info->evtchn_upcall_pending = 1;
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}
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@ -1189,7 +1204,7 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
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{
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struct shared_info *sh = HYPERVISOR_shared_info;
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int cpu = smp_processor_id();
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unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
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xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
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int i;
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unsigned long flags;
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static DEFINE_SPINLOCK(debug_lock);
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@ -1205,7 +1220,7 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
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pending = (get_irq_regs() && i == cpu)
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? xen_irqs_disabled(get_irq_regs())
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: v->evtchn_upcall_mask;
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printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
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printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
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pending, v->evtchn_upcall_pending,
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(int)(sizeof(v->evtchn_pending_sel)*2),
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v->evtchn_pending_sel);
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@ -1214,49 +1229,52 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
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printk("\npending:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
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printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
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printk("%0*"PRI_xen_ulong"%s",
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(int)sizeof(sh->evtchn_pending[0])*2,
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sh->evtchn_pending[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobal mask:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*lx%s",
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocal cpu%d mask:\n ", cpu);
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for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
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printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
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for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
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cpu_evtchn[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
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unsigned long pending = sh->evtchn_pending[i]
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xen_ulong_t pending = sh->evtchn_pending[i]
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& ~sh->evtchn_mask[i]
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& cpu_evtchn[i];
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printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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pending, i % 8 == 0 ? "\n " : " ");
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}
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printk("\npending list:\n");
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for (i = 0; i < NR_EVENT_CHANNELS; i++) {
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if (sync_test_bit(i, sh->evtchn_pending)) {
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int word_idx = i / BITS_PER_LONG;
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if (sync_test_bit(i, BM(sh->evtchn_pending))) {
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int word_idx = i / BITS_PER_EVTCHN_WORD;
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printk(" %d: event %d -> irq %d%s%s%s\n",
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cpu_from_evtchn(i), i,
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evtchn_to_irq[i],
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sync_test_bit(word_idx, &v->evtchn_pending_sel)
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sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
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? "" : " l2-clear",
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!sync_test_bit(i, sh->evtchn_mask)
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!sync_test_bit(i, BM(sh->evtchn_mask))
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? "" : " globally-masked",
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sync_test_bit(i, cpu_evtchn)
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sync_test_bit(i, BM(cpu_evtchn))
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? "" : " locally-masked");
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}
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}
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@ -1273,7 +1291,7 @@ static DEFINE_PER_CPU(unsigned int, current_bit_idx);
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/*
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* Mask out the i least significant bits of w
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*/
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#define MASK_LSBS(w, i) (w & ((~0UL) << i))
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#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
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/*
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* Search the CPUs pending events bitmasks. For each one found, map
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@ -1295,18 +1313,19 @@ static void __xen_evtchn_do_upcall(void)
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unsigned count;
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do {
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unsigned long pending_words;
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xen_ulong_t pending_words;
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vcpu_info->evtchn_upcall_pending = 0;
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if (__this_cpu_inc_return(xed_nesting_count) - 1)
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goto out;
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#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
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/* Clear master flag /before/ clearing selector flag. */
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wmb();
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#endif
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pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
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/*
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* Master flag must be cleared /before/ clearing
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* selector flag. xchg_xen_ulong must contain an
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* appropriate barrier.
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*/
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pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
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start_word_idx = __this_cpu_read(current_word_idx);
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start_bit_idx = __this_cpu_read(current_bit_idx);
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@ -1314,8 +1333,8 @@ static void __xen_evtchn_do_upcall(void)
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word_idx = start_word_idx;
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for (i = 0; pending_words != 0; i++) {
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unsigned long pending_bits;
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unsigned long words;
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xen_ulong_t pending_bits;
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xen_ulong_t words;
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words = MASK_LSBS(pending_words, word_idx);
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@ -1327,7 +1346,7 @@ static void __xen_evtchn_do_upcall(void)
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bit_idx = 0;
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continue;
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}
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word_idx = __ffs(words);
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word_idx = EVTCHN_FIRST_BIT(words);
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pending_bits = active_evtchns(cpu, s, word_idx);
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bit_idx = 0; /* usually scan entire word from start */
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@ -1342,7 +1361,7 @@ static void __xen_evtchn_do_upcall(void)
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}
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do {
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unsigned long bits;
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xen_ulong_t bits;
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int port, irq;
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struct irq_desc *desc;
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@ -1352,10 +1371,10 @@ static void __xen_evtchn_do_upcall(void)
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if (bits == 0)
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break;
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bit_idx = __ffs(bits);
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bit_idx = EVTCHN_FIRST_BIT(bits);
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/* Process port. */
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port = (word_idx * BITS_PER_LONG) + bit_idx;
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port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
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irq = evtchn_to_irq[port];
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if (irq != -1) {
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@ -1364,12 +1383,12 @@ static void __xen_evtchn_do_upcall(void)
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generic_handle_irq_desc(irq, desc);
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}
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bit_idx = (bit_idx + 1) % BITS_PER_LONG;
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bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
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/* Next caller starts at last processed + 1 */
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__this_cpu_write(current_word_idx,
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bit_idx ? word_idx :
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(word_idx+1) % BITS_PER_LONG);
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(word_idx+1) % BITS_PER_EVTCHN_WORD);
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__this_cpu_write(current_bit_idx, bit_idx);
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} while (bit_idx != 0);
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@ -1377,7 +1396,7 @@ static void __xen_evtchn_do_upcall(void)
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if ((word_idx != start_word_idx) || (i != 0))
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pending_words &= ~(1UL << word_idx);
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word_idx = (word_idx + 1) % BITS_PER_LONG;
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word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
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}
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BUG_ON(!irqs_disabled());
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@ -1487,8 +1506,8 @@ int resend_irq_on_evtchn(unsigned int irq)
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if (!VALID_EVTCHN(evtchn))
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return 1;
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masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
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sync_set_bit(evtchn, s->evtchn_pending);
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masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask));
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sync_set_bit(evtchn, BM(s->evtchn_pending));
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if (!masked)
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unmask_evtchn(evtchn);
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@ -1536,8 +1555,8 @@ static int retrigger_dynirq(struct irq_data *data)
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if (VALID_EVTCHN(evtchn)) {
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int masked;
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masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
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sync_set_bit(evtchn, sh->evtchn_pending);
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masked = sync_test_and_set_bit(evtchn, BM(sh->evtchn_mask));
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sync_set_bit(evtchn, BM(sh->evtchn_pending));
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if (!masked)
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unmask_evtchn(evtchn);
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ret = 1;
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@ -285,7 +285,7 @@ DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
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* Event channel endpoints per domain:
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* 1024 if a long is 32 bits; 4096 if a long is 64 bits.
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*/
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#define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
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#define NR_EVENT_CHANNELS (sizeof(xen_ulong_t) * sizeof(xen_ulong_t) * 64)
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struct vcpu_time_info {
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/*
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@ -341,7 +341,7 @@ struct vcpu_info {
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*/
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uint8_t evtchn_upcall_pending;
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uint8_t evtchn_upcall_mask;
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unsigned long evtchn_pending_sel;
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xen_ulong_t evtchn_pending_sel;
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struct arch_vcpu_info arch;
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struct pvclock_vcpu_time_info time;
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}; /* 64 bytes (x86) */
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@ -384,8 +384,8 @@ struct shared_info {
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* per-vcpu selector word to be set. Each bit in the selector covers a
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* 'C long' in the PENDING bitfield array.
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*/
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unsigned long evtchn_pending[sizeof(unsigned long) * 8];
|
||||
unsigned long evtchn_mask[sizeof(unsigned long) * 8];
|
||||
xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8];
|
||||
xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8];
|
||||
|
||||
/*
|
||||
* Wallclock time: updated only by control software. Guests should base
|
||||
|
|
Loading…
Reference in a new issue