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- exynos4415 and exynos audio subsystem clk driver (build

with PM_SLEEP disabled, resource release) fixes
 - minor cleanups in drivers/clk/samsung/clk.c (spelling,
   includes)
 - modification of the exynos4 HDMI PHY clock definition to
   model dependency of "sclk_hdmiphy" on the "hdmi" clock
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Merge tag 'for-v3.19-exynos-clk-2' of git://linuxtv.org/snawrocki/samsung into clk-next

- exynos4415 and exynos audio subsystem clk driver (build
  with PM_SLEEP disabled, resource release) fixes
- minor cleanups in drivers/clk/samsung/clk.c (spelling,
  includes)
- modification of the exynos4 HDMI PHY clock definition to
  model dependency of "sclk_hdmiphy" on the "hdmi" clock
hifive-unleashed-5.1
Michael Turquette 2014-12-11 12:17:15 -08:00
commit c9b928148e
5 changed files with 12 additions and 10 deletions

View File

@ -210,6 +210,10 @@ static int exynos_audss_clk_remove(struct platform_device *pdev)
{
int i;
#ifdef CONFIG_PM_SLEEP
unregister_syscore_ops(&exynos_audss_clk_syscore_ops);
#endif
of_clk_del_provider(pdev->dev.of_node);
for (i = 0; i < clk_data.clk_num; i++) {

View File

@ -505,7 +505,7 @@ static struct samsung_fixed_rate_clock exynos4_fixed_rate_ext_clks[] __initdata
/* fixed rate clocks generated inside the soc */
static struct samsung_fixed_rate_clock exynos4_fixed_rate_clks[] __initdata = {
FRATE(0, "sclk_hdmi24m", NULL, CLK_IS_ROOT, 24000000),
FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 27000000),
FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", "hdmi", 0, 27000000),
FRATE(0, "sclk_usbphy0", NULL, CLK_IS_ROOT, 48000000),
};

View File

@ -118,12 +118,13 @@ enum exynos4415_plls {
nr_plls,
};
static struct samsung_clk_provider *exynos4415_ctx;
/*
* Support for CMU save/restore across system suspends
*/
#ifdef CONFIG_PM_SLEEP
static struct samsung_clk_reg_dump *exynos4415_clk_regs;
static struct samsung_clk_provider *exynos4415_ctx;
static unsigned long exynos4415_cmu_clk_regs[] __initdata = {
SRC_LEFTBUS,
@ -1031,9 +1032,10 @@ enum exynos4415_dmc_plls {
nr_dmc_plls,
};
static struct samsung_clk_provider *exynos4415_dmc_ctx;
#ifdef CONFIG_PM_SLEEP
static struct samsung_clk_reg_dump *exynos4415_dmc_clk_regs;
static struct samsung_clk_provider *exynos4415_dmc_ctx;
static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = {
MPLL_LOCK,

View File

@ -11,7 +11,9 @@
* clock framework for Samsung platforms.
*/
#include <linux/of_address.h>
#include <linux/syscore_ops.h>
#include "clk.h"
static LIST_HEAD(clock_reg_cache_list);
@ -283,7 +285,6 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
* obtain the clock speed of all external fixed clock sources from device
* tree and register it
*/
#ifdef CONFIG_OF
void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
struct samsung_fixed_rate_clock *fixed_rate_clk,
unsigned int nr_fixed_rate_clk,
@ -300,7 +301,6 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
}
samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
}
#endif
/* utility function to get the rate of a specified clock */
unsigned long _get_rate(const char *clk_name)

View File

@ -13,19 +13,15 @@
#ifndef __SAMSUNG_CLK_H
#define __SAMSUNG_CLK_H
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/io.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "clk-pll.h"
/**
* struct samsung_clk_provider: information about clock provider
* @reg_base: virtual address for the register base.
* @clk_data: holds clock related data like clk* and number of clocks.
* @lock: maintains exclusion bwtween callbacks for a given clock-provider.
* @lock: maintains exclusion between callbacks for a given clock-provider.
*/
struct samsung_clk_provider {
void __iomem *reg_base;