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ARM: dts: sunxi: Conform to DT spec for NAND controller

The NAND controller node name should be nand-controller and not nand as we
used previously according to the devicetree specification. Let's fix our
DTs.

Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
hifive-unleashed-5.2
Maxime Ripard 2019-04-01 23:13:55 +02:00
parent 3764db4f0b
commit c9d10c3e0e
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GPG Key ID: E3EF0D6F671851C5
4 changed files with 4 additions and 4 deletions

View File

@ -267,7 +267,7 @@
#dma-cells = <2>;
};
nfc: nand@1c03000 {
nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;

View File

@ -189,7 +189,7 @@
#dma-cells = <2>;
};
nfc: nand@1c03000 {
nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;

View File

@ -333,7 +333,7 @@
#dma-cells = <2>;
};
nfc: nand@1c03000 {
nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -161,7 +161,7 @@
#dma-cells = <1>;
};
nfc: nand@1c03000 {
nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;