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Merge branch 'lan743x-Add-features-to-lan743x-driver'

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Bryan Whitehead says:

====================
lan743x: Add features to lan743x driver

This patch series adds extra features to the lan743x driver.

Updates for v4:
Patch 6/8 - Modified get/set_wol to use super set of
	    MAC and PHY driver support.
Patch 7/9 - In set_eee, return the return value from phy_ethtool_set_eee.

Updates for v3:
Removed patch 9 from this series, regarding PTP support
Patch 6/8 - Add call to phy_ethtool_get_wol to lan743x_ethtool_get_wol
Patch 7/8 - Add call to phy_ethtool_set_eee on (!eee->eee_enabled)

Updates for v2:
Patch 3/9 - Used ARRAY_SIZE macro in lan743x_ethtool_get_ethtool_stats.
Patch 5/9 - Used MAX_EEPROM_SIZE in lan743x_ethtool_set_eeprom.
Patch 6/9 - Removed unnecessary read of PMT_CTL.
	    Used CRC algorithm from lib.
	    Removed PHY interrupt settings from lan743x_pm_suspend
	    Change "#if CONFIG_PM" to "#ifdef CONFIG_PM"
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2018-07-23 14:09:19 -07:00
parent 8760c4d6d5 43e8fe9b84
commit c9eaaa1773
5 changed files with 1042 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/net/ethernet/microchip/Makefile
View file

@ -6,4 +6,4 @@ obj-$(CONFIG_ENC28J60) += enc28j60.o
obj-$(CONFIG_ENCX24J600) += encx24j600.o encx24j600-regmap.o
obj-$(CONFIG_LAN743X) += lan743x.o
lan743x-objs := lan743x_main.o
lan743x-objs := lan743x_main.o lan743x_ethtool.o

696
drivers/net/ethernet/microchip/lan743x_ethtool.c Normal file
View file

@ -0,0 +1,696 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (C) 2018 Microchip Technology Inc. */
#include <linux/netdevice.h>
#include "lan743x_main.h"
#include "lan743x_ethtool.h"
#include <linux/pci.h>
#include <linux/phy.h>
/* eeprom */
#define LAN743X_EEPROM_MAGIC (0x74A5)
#define LAN743X_OTP_MAGIC (0x74F3)
#define EEPROM_INDICATOR_1 (0xA5)
#define EEPROM_INDICATOR_2 (0xAA)
#define EEPROM_MAC_OFFSET (0x01)
#define MAX_EEPROM_SIZE 512
#define OTP_INDICATOR_1 (0xF3)
#define OTP_INDICATOR_2 (0xF7)
static int lan743x_otp_write(struct lan743x_adapter *adapter, u32 offset,
u32 length, u8 *data)
{
unsigned long timeout;
u32 buf;
int i;
buf = lan743x_csr_read(adapter, OTP_PWR_DN);
if (buf & OTP_PWR_DN_PWRDN_N_) {
/* clear it and wait to be cleared */
lan743x_csr_write(adapter, OTP_PWR_DN, 0);
timeout = jiffies + HZ;
do {
udelay(1);
buf = lan743x_csr_read(adapter, OTP_PWR_DN);
if (time_after(jiffies, timeout)) {
netif_warn(adapter, drv, adapter->netdev,
"timeout on OTP_PWR_DN completion\n");
return -EIO;
}
} while (buf & OTP_PWR_DN_PWRDN_N_);
}
/* set to BYTE program mode */
lan743x_csr_write(adapter, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
for (i = 0; i < length; i++) {
lan743x_csr_write(adapter, OTP_ADDR1,
((offset + i) >> 8) &
OTP_ADDR1_15_11_MASK_);
lan743x_csr_write(adapter, OTP_ADDR2,
((offset + i) &
OTP_ADDR2_10_3_MASK_));
lan743x_csr_write(adapter, OTP_PRGM_DATA, data[i]);
lan743x_csr_write(adapter, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
lan743x_csr_write(adapter, OTP_CMD_GO, OTP_CMD_GO_GO_);
timeout = jiffies + HZ;
do {
udelay(1);
buf = lan743x_csr_read(adapter, OTP_STATUS);
if (time_after(jiffies, timeout)) {
netif_warn(adapter, drv, adapter->netdev,
"Timeout on OTP_STATUS completion\n");
return -EIO;
}
} while (buf & OTP_STATUS_BUSY_);
}
return 0;
}
static int lan743x_eeprom_wait(struct lan743x_adapter *adapter)
{
unsigned long start_time = jiffies;
u32 val;
do {
val = lan743x_csr_read(adapter, E2P_CMD);
if (!(val & E2P_CMD_EPC_BUSY_) ||
(val & E2P_CMD_EPC_TIMEOUT_))
break;
usleep_range(40, 100);
} while (!time_after(jiffies, start_time + HZ));
if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
netif_warn(adapter, drv, adapter->netdev,
"EEPROM read operation timeout\n");
return -EIO;
}
return 0;
}
static int lan743x_eeprom_confirm_not_busy(struct lan743x_adapter *adapter)
{
unsigned long start_time = jiffies;
u32 val;
do {
val = lan743x_csr_read(adapter, E2P_CMD);
if (!(val & E2P_CMD_EPC_BUSY_))
return 0;
usleep_range(40, 100);
} while (!time_after(jiffies, start_time + HZ));
netif_warn(adapter, drv, adapter->netdev, "EEPROM is busy\n");
return -EIO;
}
static int lan743x_eeprom_read(struct lan743x_adapter *adapter,
u32 offset, u32 length, u8 *data)
{
int retval;
u32 val;
int i;
retval = lan743x_eeprom_confirm_not_busy(adapter);
if (retval)
return retval;
for (i = 0; i < length; i++) {
val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
lan743x_csr_write(adapter, E2P_CMD, val);
retval = lan743x_eeprom_wait(adapter);
if (retval < 0)
return retval;
val = lan743x_csr_read(adapter, E2P_DATA);
data[i] = val & 0xFF;
offset++;
}
return 0;
}
static int lan743x_eeprom_write(struct lan743x_adapter *adapter,
u32 offset, u32 length, u8 *data)
{
int retval;
u32 val;
int i;
retval = lan743x_eeprom_confirm_not_busy(adapter);
if (retval)
return retval;
/* Issue write/erase enable command */
val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
lan743x_csr_write(adapter, E2P_CMD, val);
retval = lan743x_eeprom_wait(adapter);
if (retval < 0)
return retval;
for (i = 0; i < length; i++) {
/* Fill data register */
val = data[i];
lan743x_csr_write(adapter, E2P_DATA, val);
/* Send "write" command */
val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
lan743x_csr_write(adapter, E2P_CMD, val);
retval = lan743x_eeprom_wait(adapter);
if (retval < 0)
return retval;
offset++;
}
return 0;
}
static void lan743x_ethtool_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *info)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
strlcpy(info->driver, DRIVER_NAME, sizeof(info->driver));
strlcpy(info->bus_info,
pci_name(adapter->pdev), sizeof(info->bus_info));
}
static u32 lan743x_ethtool_get_msglevel(struct net_device *netdev)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
return adapter->msg_enable;
}
static void lan743x_ethtool_set_msglevel(struct net_device *netdev,
u32 msglevel)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
adapter->msg_enable = msglevel;
}
static int lan743x_ethtool_get_eeprom_len(struct net_device *netdev)
{
return MAX_EEPROM_SIZE;
}
static int lan743x_ethtool_get_eeprom(struct net_device *netdev,
struct ethtool_eeprom *ee, u8 *data)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
return lan743x_eeprom_read(adapter, ee->offset, ee->len, data);
}
static int lan743x_ethtool_set_eeprom(struct net_device *netdev,
struct ethtool_eeprom *ee, u8 *data)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
int ret = -EINVAL;
if (ee->magic == LAN743X_EEPROM_MAGIC)
ret = lan743x_eeprom_write(adapter, ee->offset, ee->len,
data);
/* Beware! OTP is One Time Programming ONLY!
* So do some strict condition check before messing up
*/
else if ((ee->magic == LAN743X_OTP_MAGIC) &&
(ee->offset == 0) &&
(ee->len == MAX_EEPROM_SIZE) &&
(data[0] == OTP_INDICATOR_1))
ret = lan743x_otp_write(adapter, ee->offset, ee->len, data);
return ret;
}
static const char lan743x_set0_hw_cnt_strings[][ETH_GSTRING_LEN] = {
"RX FCS Errors",
"RX Alignment Errors",
"Rx Fragment Errors",
"RX Jabber Errors",
"RX Undersize Frame Errors",
"RX Oversize Frame Errors",
"RX Dropped Frames",
"RX Unicast Byte Count",
"RX Broadcast Byte Count",
"RX Multicast Byte Count",
"RX Unicast Frames",
"RX Broadcast Frames",
"RX Multicast Frames",
"RX Pause Frames",
"RX 64 Byte Frames",
"RX 65 - 127 Byte Frames",
"RX 128 - 255 Byte Frames",
"RX 256 - 511 Bytes Frames",
"RX 512 - 1023 Byte Frames",
"RX 1024 - 1518 Byte Frames",
"RX Greater 1518 Byte Frames",
};
static const char lan743x_set1_sw_cnt_strings[][ETH_GSTRING_LEN] = {
"RX Queue 0 Frames",
"RX Queue 1 Frames",
"RX Queue 2 Frames",
"RX Queue 3 Frames",
};
static const char lan743x_set2_hw_cnt_strings[][ETH_GSTRING_LEN] = {
"RX Total Frames",
"EEE RX LPI Transitions",
"EEE RX LPI Time",
"RX Counter Rollover Status",
"TX FCS Errors",
"TX Excess Deferral Errors",
"TX Carrier Errors",
"TX Bad Byte Count",
"TX Single Collisions",
"TX Multiple Collisions",
"TX Excessive Collision",
"TX Late Collisions",
"TX Unicast Byte Count",
"TX Broadcast Byte Count",
"TX Multicast Byte Count",
"TX Unicast Frames",
"TX Broadcast Frames",
"TX Multicast Frames",
"TX Pause Frames",
"TX 64 Byte Frames",
"TX 65 - 127 Byte Frames",
"TX 128 - 255 Byte Frames",
"TX 256 - 511 Bytes Frames",
"TX 512 - 1023 Byte Frames",
"TX 1024 - 1518 Byte Frames",
"TX Greater 1518 Byte Frames",
"TX Total Frames",
"EEE TX LPI Transitions",
"EEE TX LPI Time",
"TX Counter Rollover Status",
};
static const u32 lan743x_set0_hw_cnt_addr[] = {
STAT_RX_FCS_ERRORS,
STAT_RX_ALIGNMENT_ERRORS,
STAT_RX_FRAGMENT_ERRORS,
STAT_RX_JABBER_ERRORS,
STAT_RX_UNDERSIZE_FRAME_ERRORS,
STAT_RX_OVERSIZE_FRAME_ERRORS,
STAT_RX_DROPPED_FRAMES,
STAT_RX_UNICAST_BYTE_COUNT,
STAT_RX_BROADCAST_BYTE_COUNT,
STAT_RX_MULTICAST_BYTE_COUNT,
STAT_RX_UNICAST_FRAMES,
STAT_RX_BROADCAST_FRAMES,
STAT_RX_MULTICAST_FRAMES,
STAT_RX_PAUSE_FRAMES,
STAT_RX_64_BYTE_FRAMES,
STAT_RX_65_127_BYTE_FRAMES,
STAT_RX_128_255_BYTE_FRAMES,
STAT_RX_256_511_BYTES_FRAMES,
STAT_RX_512_1023_BYTE_FRAMES,
STAT_RX_1024_1518_BYTE_FRAMES,
STAT_RX_GREATER_1518_BYTE_FRAMES,
};
static const u32 lan743x_set2_hw_cnt_addr[] = {
STAT_RX_TOTAL_FRAMES,
STAT_EEE_RX_LPI_TRANSITIONS,
STAT_EEE_RX_LPI_TIME,
STAT_RX_COUNTER_ROLLOVER_STATUS,
STAT_TX_FCS_ERRORS,
STAT_TX_EXCESS_DEFERRAL_ERRORS,
STAT_TX_CARRIER_ERRORS,
STAT_TX_BAD_BYTE_COUNT,
STAT_TX_SINGLE_COLLISIONS,
STAT_TX_MULTIPLE_COLLISIONS,
STAT_TX_EXCESSIVE_COLLISION,
STAT_TX_LATE_COLLISIONS,
STAT_TX_UNICAST_BYTE_COUNT,
STAT_TX_BROADCAST_BYTE_COUNT,
STAT_TX_MULTICAST_BYTE_COUNT,
STAT_TX_UNICAST_FRAMES,
STAT_TX_BROADCAST_FRAMES,
STAT_TX_MULTICAST_FRAMES,
STAT_TX_PAUSE_FRAMES,
STAT_TX_64_BYTE_FRAMES,
STAT_TX_65_127_BYTE_FRAMES,
STAT_TX_128_255_BYTE_FRAMES,
STAT_TX_256_511_BYTES_FRAMES,
STAT_TX_512_1023_BYTE_FRAMES,
STAT_TX_1024_1518_BYTE_FRAMES,
STAT_TX_GREATER_1518_BYTE_FRAMES,
STAT_TX_TOTAL_FRAMES,
STAT_EEE_TX_LPI_TRANSITIONS,
STAT_EEE_TX_LPI_TIME,
STAT_TX_COUNTER_ROLLOVER_STATUS
};
static void lan743x_ethtool_get_strings(struct net_device *netdev,
u32 stringset, u8 *data)
{
switch (stringset) {
case ETH_SS_STATS:
memcpy(data, lan743x_set0_hw_cnt_strings,
sizeof(lan743x_set0_hw_cnt_strings));
memcpy(&data[sizeof(lan743x_set0_hw_cnt_strings)],
lan743x_set1_sw_cnt_strings,
sizeof(lan743x_set1_sw_cnt_strings));
memcpy(&data[sizeof(lan743x_set0_hw_cnt_strings) +
sizeof(lan743x_set1_sw_cnt_strings)],
lan743x_set2_hw_cnt_strings,
sizeof(lan743x_set2_hw_cnt_strings));
break;
}
}
static void lan743x_ethtool_get_ethtool_stats(struct net_device *netdev,
struct ethtool_stats *stats,
u64 *data)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
int data_index = 0;
u32 buf;
int i;
for (i = 0; i < ARRAY_SIZE(lan743x_set0_hw_cnt_addr); i++) {
buf = lan743x_csr_read(adapter, lan743x_set0_hw_cnt_addr[i]);
data[data_index++] = (u64)buf;
}
for (i = 0; i < ARRAY_SIZE(adapter->rx); i++)
data[data_index++] = (u64)(adapter->rx[i].frame_count);
for (i = 0; i < ARRAY_SIZE(lan743x_set2_hw_cnt_addr); i++) {
buf = lan743x_csr_read(adapter, lan743x_set2_hw_cnt_addr[i]);
data[data_index++] = (u64)buf;
}
}
static int lan743x_ethtool_get_sset_count(struct net_device *netdev, int sset)
{
switch (sset) {
case ETH_SS_STATS:
{
int ret;
ret = ARRAY_SIZE(lan743x_set0_hw_cnt_strings);
ret += ARRAY_SIZE(lan743x_set1_sw_cnt_strings);
ret += ARRAY_SIZE(lan743x_set2_hw_cnt_strings);
return ret;
}
default:
return -EOPNOTSUPP;
}
}
static int lan743x_ethtool_get_rxnfc(struct net_device *netdev,
struct ethtool_rxnfc *rxnfc,
u32 *rule_locs)
{
switch (rxnfc->cmd) {
case ETHTOOL_GRXFH:
rxnfc->data = 0;
switch (rxnfc->flow_type) {
case TCP_V4_FLOW:case UDP_V4_FLOW:
case TCP_V6_FLOW:case UDP_V6_FLOW:
rxnfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
/* fall through */
case IPV4_FLOW: case IPV6_FLOW:
rxnfc->data |= RXH_IP_SRC | RXH_IP_DST;
return 0;
}
break;
case ETHTOOL_GRXRINGS:
rxnfc->data = LAN743X_USED_RX_CHANNELS;
return 0;
}
return -EOPNOTSUPP;
}
static u32 lan743x_ethtool_get_rxfh_key_size(struct net_device *netdev)
{
return 40;
}
static u32 lan743x_ethtool_get_rxfh_indir_size(struct net_device *netdev)
{
return 128;
}
static int lan743x_ethtool_get_rxfh(struct net_device *netdev,
u32 *indir, u8 *key, u8 *hfunc)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
if (indir) {
int dw_index;
int byte_index = 0;
for (dw_index = 0; dw_index < 32; dw_index++) {
u32 four_entries =
lan743x_csr_read(adapter, RFE_INDX(dw_index));
byte_index = dw_index << 2;
indir[byte_index + 0] =
((four_entries >> 0) & 0x000000FF);
indir[byte_index + 1] =
((four_entries >> 8) & 0x000000FF);
indir[byte_index + 2] =
((four_entries >> 16) & 0x000000FF);
indir[byte_index + 3] =
((four_entries >> 24) & 0x000000FF);
}
}
if (key) {
int dword_index;
int byte_index = 0;
for (dword_index = 0; dword_index < 10; dword_index++) {
u32 four_entries =
lan743x_csr_read(adapter,
RFE_HASH_KEY(dword_index));
byte_index = dword_index << 2;
key[byte_index + 0] =
((four_entries >> 0) & 0x000000FF);
key[byte_index + 1] =
((four_entries >> 8) & 0x000000FF);
key[byte_index + 2] =
((four_entries >> 16) & 0x000000FF);
key[byte_index + 3] =
((four_entries >> 24) & 0x000000FF);
}
}
if (hfunc)
(*hfunc) = ETH_RSS_HASH_TOP;
return 0;
}
static int lan743x_ethtool_set_rxfh(struct net_device *netdev,
const u32 *indir, const u8 *key,
const u8 hfunc)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
return -EOPNOTSUPP;
if (indir) {
u32 indir_value = 0;
int dword_index = 0;
int byte_index = 0;
for (dword_index = 0; dword_index < 32; dword_index++) {
byte_index = dword_index << 2;
indir_value =
(((indir[byte_index + 0] & 0x000000FF) << 0) |
((indir[byte_index + 1] & 0x000000FF) << 8) |
((indir[byte_index + 2] & 0x000000FF) << 16) |
((indir[byte_index + 3] & 0x000000FF) << 24));
lan743x_csr_write(adapter, RFE_INDX(dword_index),
indir_value);
}
}
if (key) {
int dword_index = 0;
int byte_index = 0;
u32 key_value = 0;
for (dword_index = 0; dword_index < 10; dword_index++) {
byte_index = dword_index << 2;
key_value =
((((u32)(key[byte_index + 0])) << 0) |
(((u32)(key[byte_index + 1])) << 8) |
(((u32)(key[byte_index + 2])) << 16) |
(((u32)(key[byte_index + 3])) << 24));
lan743x_csr_write(adapter, RFE_HASH_KEY(dword_index),
key_value);
}
}
return 0;
}
static int lan743x_ethtool_get_eee(struct net_device *netdev,
struct ethtool_eee *eee)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
struct phy_device *phydev = netdev->phydev;
u32 buf;
int ret;
if (!phydev)
return -EIO;
if (!phydev->drv) {
netif_err(adapter, drv, adapter->netdev,
"Missing PHY Driver\n");
return -EIO;
}
ret = phy_ethtool_get_eee(phydev, eee);
if (ret < 0)
return ret;
buf = lan743x_csr_read(adapter, MAC_CR);
if (buf & MAC_CR_EEE_EN_) {
eee->eee_enabled = true;
eee->eee_active = !!(eee->advertised & eee->lp_advertised);
eee->tx_lpi_enabled = true;
/* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
buf = lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);
eee->tx_lpi_timer = buf;
} else {
eee->eee_enabled = false;
eee->eee_active = false;
eee->tx_lpi_enabled = false;
eee->tx_lpi_timer = 0;
}
return 0;
}
static int lan743x_ethtool_set_eee(struct net_device *netdev,
struct ethtool_eee *eee)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
struct phy_device *phydev = NULL;
u32 buf = 0;
int ret = 0;
if (!netdev)
return -EINVAL;
adapter = netdev_priv(netdev);
if (!adapter)
return -EINVAL;
phydev = netdev->phydev;
if (!phydev)
return -EIO;
if (!phydev->drv) {
netif_err(adapter, drv, adapter->netdev,
"Missing PHY Driver\n");
return -EIO;
}
if (eee->eee_enabled) {
ret = phy_init_eee(phydev, 0);
if (ret) {
netif_err(adapter, drv, adapter->netdev,
"EEE initialization failed\n");
return ret;
}
buf = (u32)eee->tx_lpi_timer;
lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, buf);
buf = lan743x_csr_read(adapter, MAC_CR);
buf |= MAC_CR_EEE_EN_;
lan743x_csr_write(adapter, MAC_CR, buf);
} else {
buf = lan743x_csr_read(adapter, MAC_CR);
buf &= ~MAC_CR_EEE_EN_;
lan743x_csr_write(adapter, MAC_CR, buf);
}
return phy_ethtool_set_eee(phydev, eee);
}
#ifdef CONFIG_PM
static void lan743x_ethtool_get_wol(struct net_device *netdev,
struct ethtool_wolinfo *wol)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
wol->supported = 0;
wol->wolopts = 0;
phy_ethtool_get_wol(netdev->phydev, wol);
wol->supported |= WAKE_BCAST | WAKE_UCAST | WAKE_MCAST |
WAKE_MAGIC | WAKE_PHY | WAKE_ARP;
wol->wolopts |= adapter->wolopts;
}
static int lan743x_ethtool_set_wol(struct net_device *netdev,
struct ethtool_wolinfo *wol)
{
struct lan743x_adapter *adapter = netdev_priv(netdev);
adapter->wolopts = 0;
if (wol->wolopts & WAKE_UCAST)
adapter->wolopts |= WAKE_UCAST;
if (wol->wolopts & WAKE_MCAST)
adapter->wolopts |= WAKE_MCAST;
if (wol->wolopts & WAKE_BCAST)
adapter->wolopts |= WAKE_BCAST;
if (wol->wolopts & WAKE_MAGIC)
adapter->wolopts |= WAKE_MAGIC;
if (wol->wolopts & WAKE_PHY)
adapter->wolopts |= WAKE_PHY;
if (wol->wolopts & WAKE_ARP)
adapter->wolopts |= WAKE_ARP;
device_set_wakeup_enable(&adapter->pdev->dev, (bool)wol->wolopts);
phy_ethtool_set_wol(netdev->phydev, wol);
return 0;
}
#endif /* CONFIG_PM */
const struct ethtool_ops lan743x_ethtool_ops = {
.get_drvinfo = lan743x_ethtool_get_drvinfo,
.get_msglevel = lan743x_ethtool_get_msglevel,
.set_msglevel = lan743x_ethtool_set_msglevel,
.get_link = ethtool_op_get_link,
.get_eeprom_len = lan743x_ethtool_get_eeprom_len,
.get_eeprom = lan743x_ethtool_get_eeprom,
.set_eeprom = lan743x_ethtool_set_eeprom,
.get_strings = lan743x_ethtool_get_strings,
.get_ethtool_stats = lan743x_ethtool_get_ethtool_stats,
.get_sset_count = lan743x_ethtool_get_sset_count,
.get_rxnfc = lan743x_ethtool_get_rxnfc,
.get_rxfh_key_size = lan743x_ethtool_get_rxfh_key_size,
.get_rxfh_indir_size = lan743x_ethtool_get_rxfh_indir_size,
.get_rxfh = lan743x_ethtool_get_rxfh,
.set_rxfh = lan743x_ethtool_set_rxfh,
.get_eee = lan743x_ethtool_get_eee,
.set_eee = lan743x_ethtool_set_eee,
.get_link_ksettings = phy_ethtool_get_link_ksettings,
.set_link_ksettings = phy_ethtool_set_link_ksettings,
#ifdef CONFIG_PM
.get_wol = lan743x_ethtool_get_wol,
.set_wol = lan743x_ethtool_set_wol,
#endif
};

11
drivers/net/ethernet/microchip/lan743x_ethtool.h Normal file
View file

@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (C) 2018 Microchip Technology Inc. */
#ifndef _LAN743X_ETHTOOL_H
#define _LAN743X_ETHTOOL_H
#include "linux/ethtool.h"
extern const struct ethtool_ops lan743x_ethtool_ops;
#endif /* _LAN743X_ETHTOOL_H */

204
drivers/net/ethernet/microchip/lan743x_main.c
View file

@ -11,7 +11,9 @@
#include <linux/phy.h>
#include <linux/rtnetlink.h>
#include <linux/iopoll.h>
#include <linux/crc16.h>
#include "lan743x_main.h"
#include "lan743x_ethtool.h"
static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
{
@ -53,13 +55,13 @@ return_error:
return ret;
}
static u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
{
return ioread32(&adapter->csr.csr_address[offset]);
}
static void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
u32 data)
void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
u32 data)
{
iowrite32(data, &adapter->csr.csr_address[offset]);
}
@ -1023,6 +1025,24 @@ return_error:
return ret;
}
static void lan743x_rfe_open(struct lan743x_adapter *adapter)
{
lan743x_csr_write(adapter, RFE_RSS_CFG,
RFE_RSS_CFG_UDP_IPV6_EX_ |
RFE_RSS_CFG_TCP_IPV6_EX_ |
RFE_RSS_CFG_IPV6_EX_ |
RFE_RSS_CFG_UDP_IPV6_ |
RFE_RSS_CFG_TCP_IPV6_ |
RFE_RSS_CFG_IPV6_ |
RFE_RSS_CFG_UDP_IPV4_ |
RFE_RSS_CFG_TCP_IPV4_ |
RFE_RSS_CFG_IPV4_ |
RFE_RSS_CFG_VALID_HASH_BITS_ |
RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
RFE_RSS_CFG_RSS_HASH_STORE_ |
RFE_RSS_CFG_RSS_ENABLE_);
}
static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
{
u8 *mac_addr;
@ -2417,6 +2437,8 @@ static int lan743x_netdev_open(struct net_device *netdev)
if (ret)
goto close_mac;
lan743x_rfe_open(adapter);
for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
ret = lan743x_rx_open(&adapter->rx[index]);
if (ret)
@ -2689,6 +2711,7 @@ static int lan743x_pcidev_probe(struct pci_dev *pdev,
goto cleanup_hardware;
adapter->netdev->netdev_ops = &lan743x_netdev_ops;
adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
adapter->netdev->hw_features = adapter->netdev->features;
@ -2747,10 +2770,182 @@ static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
lan743x_netdev_close(netdev);
rtnl_unlock();
#ifdef CONFIG_PM
pci_save_state(pdev);
#endif
/* clean up lan743x portion */
lan743x_hardware_cleanup(adapter);
}
#ifdef CONFIG_PM
static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
{
return bitrev16(crc16(0xFFFF, buf, len));
}
static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
{
const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
const u8 ipv6_multicast[3] = { 0x33, 0x33 };
const u8 arp_type[2] = { 0x08, 0x06 };
int mask_index;
u32 pmtctl;
u32 wucsr;
u32 macrx;
u16 crc;
for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
/* clear wake settings */
pmtctl = lan743x_csr_read(adapter, PMT_CTL);
pmtctl |= PMT_CTL_WUPS_MASK_;
pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
macrx = lan743x_csr_read(adapter, MAC_RX);
wucsr = 0;
mask_index = 0;
pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
if (adapter->wolopts & WAKE_PHY) {
pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
}
if (adapter->wolopts & WAKE_MAGIC) {
wucsr |= MAC_WUCSR_MPEN_;
macrx |= MAC_RX_RXEN_;
pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
}
if (adapter->wolopts & WAKE_UCAST) {
wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
macrx |= MAC_RX_RXEN_;
pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
}
if (adapter->wolopts & WAKE_BCAST) {
wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
macrx |= MAC_RX_RXEN_;
pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
}
if (adapter->wolopts & WAKE_MCAST) {
/* IPv4 multicast */
crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
(0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
(crc & MAC_WUF_CFG_CRC16_MASK_));
lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
mask_index++;
/* IPv6 multicast */
crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
(0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
(crc & MAC_WUF_CFG_CRC16_MASK_));
lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
mask_index++;
wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
macrx |= MAC_RX_RXEN_;
pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
}
if (adapter->wolopts & WAKE_ARP) {
/* set MAC_WUF_CFG & WUF_MASK
* for packettype (offset 12,13) = ARP (0x0806)
*/
crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
(0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
(crc & MAC_WUF_CFG_CRC16_MASK_));
lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
mask_index++;
wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
macrx |= MAC_RX_RXEN_;
pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
}
lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
lan743x_csr_write(adapter, PMT_CTL, pmtctl);
lan743x_csr_write(adapter, MAC_RX, macrx);
}
static int lan743x_pm_suspend(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct net_device *netdev = pci_get_drvdata(pdev);
struct lan743x_adapter *adapter = netdev_priv(netdev);
int ret;
lan743x_pcidev_shutdown(pdev);
/* clear all wakes */
lan743x_csr_write(adapter, MAC_WUCSR, 0);
lan743x_csr_write(adapter, MAC_WUCSR2, 0);
lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
if (adapter->wolopts)
lan743x_pm_set_wol(adapter);
/* Host sets PME_En, put D3hot */
ret = pci_prepare_to_sleep(pdev);
return 0;
}
static int lan743x_pm_resume(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct net_device *netdev = pci_get_drvdata(pdev);
struct lan743x_adapter *adapter = netdev_priv(netdev);
int ret;
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
pci_save_state(pdev);
ret = lan743x_hardware_init(adapter, pdev);
if (ret) {
netif_err(adapter, probe, adapter->netdev,
"lan743x_hardware_init returned %d\n", ret);
}
/* open netdev when netdev is at running state while resume.
* For instance, it is true when system wakesup after pm-suspend
* However, it is false when system wakes up after suspend GUI menu
*/
if (netif_running(netdev))
lan743x_netdev_open(netdev);
netif_device_attach(netdev);
return 0;
}
const struct dev_pm_ops lan743x_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
};
#endif /*CONFIG_PM */
static const struct pci_device_id lan743x_pcidev_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
{ 0, }
@ -2761,6 +2956,9 @@ static struct pci_driver lan743x_pcidev_driver = {
.id_table = lan743x_pcidev_tbl,
.probe = lan743x_pcidev_probe,
.remove = lan743x_pcidev_remove,
#ifdef CONFIG_PM
.driver.pm = &lan743x_pm_ops,
#endif
.shutdown = lan743x_pcidev_shutdown,
};

133
drivers/net/ethernet/microchip/lan743x_main.h
View file

@ -24,8 +24,18 @@
#define HW_CFG_LRST_ BIT(1)
#define PMT_CTL (0x014)
#define PMT_CTL_ETH_PHY_D3_COLD_OVR_ BIT(27)
#define PMT_CTL_MAC_D3_RX_CLK_OVR_ BIT(25)
#define PMT_CTL_ETH_PHY_EDPD_PLL_CTL_ BIT(24)
#define PMT_CTL_ETH_PHY_D3_OVR_ BIT(23)
#define PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ BIT(18)
#define PMT_CTL_GPIO_WAKEUP_EN_ BIT(15)
#define PMT_CTL_EEE_WAKEUP_EN_ BIT(13)
#define PMT_CTL_READY_ BIT(7)
#define PMT_CTL_ETH_PHY_RST_ BIT(4)
#define PMT_CTL_WOL_EN_ BIT(3)
#define PMT_CTL_ETH_PHY_WAKE_EN_ BIT(2)
#define PMT_CTL_WUPS_MASK_ (0x00000003)
#define DP_SEL (0x024)
#define DP_SEL_DPRDY_ BIT(31)
@ -42,6 +52,16 @@
#define DP_DATA_0 (0x030)
#define E2P_CMD (0x040)
#define E2P_CMD_EPC_BUSY_ BIT(31)
#define E2P_CMD_EPC_CMD_WRITE_ (0x30000000)
#define E2P_CMD_EPC_CMD_EWEN_ (0x20000000)
#define E2P_CMD_EPC_CMD_READ_ (0x00000000)
#define E2P_CMD_EPC_TIMEOUT_ BIT(10)
#define E2P_CMD_EPC_ADDR_MASK_ (0x000001FF)
#define E2P_DATA (0x044)
#define FCT_RX_CTL (0xAC)
#define FCT_RX_CTL_EN_(channel) BIT(28 + (channel))
#define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel))
@ -62,6 +82,7 @@
((value << 0) & FCT_FLOW_CTL_ON_THRESHOLD_)
#define MAC_CR (0x100)
#define MAC_CR_EEE_EN_ BIT(17)
#define MAC_CR_ADD_ BIT(12)
#define MAC_CR_ASD_ BIT(11)
#define MAC_CR_CNTR_RST_ BIT(5)
@ -97,6 +118,40 @@
#define MAC_MII_DATA (0x124)
#define MAC_EEE_TX_LPI_REQ_DLY_CNT (0x130)
#define MAC_WUCSR (0x140)
#define MAC_WUCSR_RFE_WAKE_EN_ BIT(14)
#define MAC_WUCSR_PFDA_EN_ BIT(3)
#define MAC_WUCSR_WAKE_EN_ BIT(2)
#define MAC_WUCSR_MPEN_ BIT(1)
#define MAC_WUCSR_BCST_EN_ BIT(0)
#define MAC_WK_SRC (0x144)
#define MAC_WUF_CFG0 (0x150)
#define MAC_NUM_OF_WUF_CFG (32)
#define MAC_WUF_CFG_BEGIN (MAC_WUF_CFG0)
#define MAC_WUF_CFG(index) (MAC_WUF_CFG_BEGIN + (4 * (index)))
#define MAC_WUF_CFG_EN_ BIT(31)
#define MAC_WUF_CFG_TYPE_MCAST_ (0x02000000)
#define MAC_WUF_CFG_TYPE_ALL_ (0x01000000)
#define MAC_WUF_CFG_OFFSET_SHIFT_ (16)
#define MAC_WUF_CFG_CRC16_MASK_ (0x0000FFFF)
#define MAC_WUF_MASK0_0 (0x200)
#define MAC_WUF_MASK0_1 (0x204)
#define MAC_WUF_MASK0_2 (0x208)
#define MAC_WUF_MASK0_3 (0x20C)
#define MAC_WUF_MASK0_BEGIN (MAC_WUF_MASK0_0)
#define MAC_WUF_MASK1_BEGIN (MAC_WUF_MASK0_1)
#define MAC_WUF_MASK2_BEGIN (MAC_WUF_MASK0_2)
#define MAC_WUF_MASK3_BEGIN (MAC_WUF_MASK0_3)
#define MAC_WUF_MASK0(index) (MAC_WUF_MASK0_BEGIN + (0x10 * (index)))
#define MAC_WUF_MASK1(index) (MAC_WUF_MASK1_BEGIN + (0x10 * (index)))
#define MAC_WUF_MASK2(index) (MAC_WUF_MASK2_BEGIN + (0x10 * (index)))
#define MAC_WUF_MASK3(index) (MAC_WUF_MASK3_BEGIN + (0x10 * (index)))
/* offset 0x400 - 0x500, x may range from 0 to 32, for a total of 33 entries */
#define RFE_ADDR_FILT_HI(x) (0x400 + (8 * (x)))
#define RFE_ADDR_FILT_HI_VALID_ BIT(31)
@ -111,6 +166,27 @@
#define RFE_CTL_MCAST_HASH_ BIT(3)
#define RFE_CTL_DA_PERFECT_ BIT(1)
#define RFE_RSS_CFG (0x554)
#define RFE_RSS_CFG_UDP_IPV6_EX_ BIT(16)
#define RFE_RSS_CFG_TCP_IPV6_EX_ BIT(15)
#define RFE_RSS_CFG_IPV6_EX_ BIT(14)
#define RFE_RSS_CFG_UDP_IPV6_ BIT(13)
#define RFE_RSS_CFG_TCP_IPV6_ BIT(12)
#define RFE_RSS_CFG_IPV6_ BIT(11)
#define RFE_RSS_CFG_UDP_IPV4_ BIT(10)
#define RFE_RSS_CFG_TCP_IPV4_ BIT(9)
#define RFE_RSS_CFG_IPV4_ BIT(8)
#define RFE_RSS_CFG_VALID_HASH_BITS_ (0x000000E0)
#define RFE_RSS_CFG_RSS_QUEUE_ENABLE_ BIT(2)
#define RFE_RSS_CFG_RSS_HASH_STORE_ BIT(1)
#define RFE_RSS_CFG_RSS_ENABLE_ BIT(0)
#define RFE_HASH_KEY(index) (0x558 + (index << 2))
#define RFE_INDX(index) (0x580 + (index << 2))
#define MAC_WUCSR2 (0x600)
#define INT_STS (0x780)
#define INT_BIT_DMA_RX_(channel) BIT(24 + (channel))
#define INT_BIT_ALL_RX_ (0x0F000000)
@ -288,9 +364,33 @@
#define TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_ BIT(3)
#define TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_ (0x00000007)
#define OTP_PWR_DN (0x1000)
#define OTP_PWR_DN_PWRDN_N_ BIT(0)
#define OTP_ADDR1 (0x1004)
#define OTP_ADDR1_15_11_MASK_ (0x1F)
#define OTP_ADDR2 (0x1008)
#define OTP_ADDR2_10_3_MASK_ (0xFF)
#define OTP_PRGM_DATA (0x1010)
#define OTP_PRGM_MODE (0x1014)
#define OTP_PRGM_MODE_BYTE_ BIT(0)
#define OTP_TST_CMD (0x1024)
#define OTP_TST_CMD_PRGVRFY_ BIT(3)
#define OTP_CMD_GO (0x1028)
#define OTP_CMD_GO_GO_ BIT(0)
#define OTP_STATUS (0x1030)
#define OTP_STATUS_BUSY_ BIT(0)
/* MAC statistics registers */
#define STAT_RX_FCS_ERRORS (0x1200)
#define STAT_RX_ALIGNMENT_ERRORS (0x1204)
#define STAT_RX_FRAGMENT_ERRORS (0x1208)
#define STAT_RX_JABBER_ERRORS (0x120C)
#define STAT_RX_UNDERSIZE_FRAME_ERRORS (0x1210)
#define STAT_RX_OVERSIZE_FRAME_ERRORS (0x1214)
@ -298,12 +398,26 @@
#define STAT_RX_UNICAST_BYTE_COUNT (0x121C)
#define STAT_RX_BROADCAST_BYTE_COUNT (0x1220)
#define STAT_RX_MULTICAST_BYTE_COUNT (0x1224)
#define STAT_RX_UNICAST_FRAMES (0x1228)
#define STAT_RX_BROADCAST_FRAMES (0x122C)
#define STAT_RX_MULTICAST_FRAMES (0x1230)
#define STAT_RX_PAUSE_FRAMES (0x1234)
#define STAT_RX_64_BYTE_FRAMES (0x1238)
#define STAT_RX_65_127_BYTE_FRAMES (0x123C)
#define STAT_RX_128_255_BYTE_FRAMES (0x1240)
#define STAT_RX_256_511_BYTES_FRAMES (0x1244)
#define STAT_RX_512_1023_BYTE_FRAMES (0x1248)
#define STAT_RX_1024_1518_BYTE_FRAMES (0x124C)
#define STAT_RX_GREATER_1518_BYTE_FRAMES (0x1250)
#define STAT_RX_TOTAL_FRAMES (0x1254)
#define STAT_EEE_RX_LPI_TRANSITIONS (0x1258)
#define STAT_EEE_RX_LPI_TIME (0x125C)
#define STAT_RX_COUNTER_ROLLOVER_STATUS (0x127C)
#define STAT_TX_FCS_ERRORS (0x1280)
#define STAT_TX_EXCESS_DEFERRAL_ERRORS (0x1284)
#define STAT_TX_CARRIER_ERRORS (0x1288)
#define STAT_TX_BAD_BYTE_COUNT (0x128C)
#define STAT_TX_SINGLE_COLLISIONS (0x1290)
#define STAT_TX_MULTIPLE_COLLISIONS (0x1294)
#define STAT_TX_EXCESSIVE_COLLISION (0x1298)
@ -311,8 +425,21 @@
#define STAT_TX_UNICAST_BYTE_COUNT (0x12A0)
#define STAT_TX_BROADCAST_BYTE_COUNT (0x12A4)
#define STAT_TX_MULTICAST_BYTE_COUNT (0x12A8)
#define STAT_TX_UNICAST_FRAMES (0x12AC)
#define STAT_TX_BROADCAST_FRAMES (0x12B0)
#define STAT_TX_MULTICAST_FRAMES (0x12B4)
#define STAT_TX_PAUSE_FRAMES (0x12B8)
#define STAT_TX_64_BYTE_FRAMES (0x12BC)
#define STAT_TX_65_127_BYTE_FRAMES (0x12C0)
#define STAT_TX_128_255_BYTE_FRAMES (0x12C4)
#define STAT_TX_256_511_BYTES_FRAMES (0x12C8)
#define STAT_TX_512_1023_BYTE_FRAMES (0x12CC)
#define STAT_TX_1024_1518_BYTE_FRAMES (0x12D0)
#define STAT_TX_GREATER_1518_BYTE_FRAMES (0x12D4)
#define STAT_TX_TOTAL_FRAMES (0x12D8)
#define STAT_EEE_TX_LPI_TRANSITIONS (0x12DC)
#define STAT_EEE_TX_LPI_TIME (0x12E0)
#define STAT_TX_COUNTER_ROLLOVER_STATUS (0x12FC)
/* End of Register definitions */
@ -473,6 +600,9 @@ struct lan743x_adapter {
struct net_device *netdev;
struct mii_bus *mdiobus;
int msg_enable;
#ifdef CONFIG_PM
u32 wolopts;
#endif
struct pci_dev *pdev;
struct lan743x_csr csr;
struct lan743x_intr intr;
@ -594,4 +724,7 @@ struct lan743x_rx_buffer_info {
#define RX_PROCESS_RESULT_PACKET_RECEIVED (1)
#define RX_PROCESS_RESULT_PACKET_DROPPED (2)
u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset);
void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, u32 data);
#endif /* _LAN743X_H */