i2c-i801: Various cleanups
* Use defines instead of raw numbers for register bits * Fix several wrong indentations and trailing whitespace * Move hwpec timeout checking to a separate function Signed-off-by: Oleg Ryjkov <olegr@google.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>hifive-unleashed-5.1
Oleg Ryjkov
Jean Delvare
parent
a92c344d8c
commit
ca8b9e32a1
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@ -22,10 +22,10 @@
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/*
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SUPPORTED DEVICES PCI ID
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82801AA 2413
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82801AB 2423
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82801BA 2443
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82801CA/CAM 2483
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82801AA 2413
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82801AB 2423
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82801BA 2443
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82801CA/CAM 2483
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82801DB 24C3 (HW PEC supported, 32 byte buffer not supported)
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82801EB 24D3 (HW PEC supported, 32 byte buffer not supported)
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6300ESB 25A4
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@ -74,6 +74,13 @@
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#define SMBHSTCFG_SMB_SMI_EN 2
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#define SMBHSTCFG_I2C_EN 4
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/* Auxillary control register bits, ICH4+ only */
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#define SMBAUXCTL_CRC 1
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#define SMBAUXCTL_E32B 2
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/* kill bit for SMBHSTCNT */
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#define SMBHSTCNT_KILL 2
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/* Other settings */
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#define MAX_TIMEOUT 100
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#define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
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@ -91,10 +98,15 @@
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#define I801_START 0x40
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#define I801_PEC_EN 0x80 /* ICH4 only */
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static int i801_transaction(void);
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static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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int command, int hwpec);
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/* I801 Hosts Status register bits */
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#define SMBHSTSTS_BYTE_DONE 0x80
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#define SMBHSTSTS_INUSE_STS 0x40
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#define SMBHSTSTS_SMBALERT_STS 0x20
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#define SMBHSTSTS_FAILED 0x10
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#define SMBHSTSTS_BUS_ERR 0x08
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#define SMBHSTSTS_DEV_ERR 0x04
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#define SMBHSTSTS_INTR 0x02
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#define SMBHSTSTS_HOST_BUSY 0x01
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static unsigned long i801_smba;
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static unsigned char i801_original_hstcfg;
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@ -133,27 +145,32 @@ static int i801_transaction(void)
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do {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
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} while ((temp & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
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result = -1;
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/* try to stop the current command */
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dev_dbg(&I801_dev->dev, "Terminating the current operation\n");
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outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
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msleep(1);
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outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT);
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}
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if (temp & 0x10) {
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if (temp & SMBHSTSTS_FAILED) {
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result = -1;
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dev_dbg(&I801_dev->dev, "Error: Failed bus transaction\n");
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}
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if (temp & 0x08) {
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if (temp & SMBHSTSTS_BUS_ERR) {
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result = -1;
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dev_err(&I801_dev->dev, "Bus collision! SMBus may be locked "
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"until next hard reset. (sorry!)\n");
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/* Clock stops and slave is stuck in mid-transmission */
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}
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if (temp & 0x04) {
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if (temp & SMBHSTSTS_DEV_ERR) {
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result = -1;
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dev_dbg(&I801_dev->dev, "Error: no response!\n");
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}
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@ -172,6 +189,24 @@ static int i801_transaction(void)
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return result;
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}
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/* wait for INTR bit as advised by Intel */
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static void i801_wait_hwpec(void)
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{
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int timeout = 0;
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int temp;
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do {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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} while ((!(temp & SMBHSTSTS_INTR))
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&& (timeout++ < MAX_TIMEOUT));
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if (timeout >= MAX_TIMEOUT) {
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dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
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}
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outb_p(temp, SMBHSTSTS);
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}
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/* All-inclusive block transaction function */
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static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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int command, int hwpec)
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@ -227,13 +262,13 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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/* Make sure the SMBus host is ready to start transmitting */
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temp = inb_p(SMBHSTSTS);
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if (i == 1) {
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/* Erronenous conditions before transaction:
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/* Erronenous conditions before transaction:
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* Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
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errmask=0x9f;
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errmask = 0x9f;
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} else {
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/* Erronenous conditions during transaction:
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/* Erronenous conditions during transaction:
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* Failed, Bus_Err, Dev_Err, Intr */
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errmask=0x1e;
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errmask = 0x1e;
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}
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if (temp & errmask) {
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dev_dbg(&I801_dev->dev, "SMBus busy (%02x). "
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@ -243,7 +278,7 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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dev_err(&I801_dev->dev,
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"Reset failed! (%02x)\n", temp);
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result = -1;
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goto END;
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goto END;
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}
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if (i != 1) {
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/* if die in middle of block transaction, fail */
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@ -261,33 +296,40 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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}
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while ((!(temp & 0x80))
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&& (timeout++ < MAX_TIMEOUT));
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while ((!(temp & SMBHSTSTS_BYTE_DONE))
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&& (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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/* try to stop the current command */
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dev_dbg(&I801_dev->dev, "Terminating the current "
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"operation\n");
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outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
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msleep(1);
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outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL),
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SMBHSTCNT);
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result = -1;
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dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
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}
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if (temp & 0x10) {
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if (temp & SMBHSTSTS_FAILED) {
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result = -1;
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dev_dbg(&I801_dev->dev,
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"Error: Failed bus transaction\n");
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} else if (temp & 0x08) {
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} else if (temp & SMBHSTSTS_BUS_ERR) {
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result = -1;
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dev_err(&I801_dev->dev, "Bus collision!\n");
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} else if (temp & 0x04) {
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} else if (temp & SMBHSTSTS_DEV_ERR) {
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result = -1;
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dev_dbg(&I801_dev->dev, "Error: no response!\n");
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}
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if (i == 1 && read_write == I2C_SMBUS_READ) {
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len = inb_p(SMBHSTDAT0);
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if (len < 1)
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len = 1;
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if (len > 32)
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len = 32;
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if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
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result = -1;
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goto END;
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}
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data->block[0] = len;
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}
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@ -313,20 +355,9 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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goto END;
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}
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if (hwpec) {
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/* wait for INTR bit as advised by Intel */
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timeout = 0;
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do {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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} while ((!(temp & 0x02))
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&& (timeout++ < MAX_TIMEOUT));
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if (hwpec)
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i801_wait_hwpec();
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if (timeout >= MAX_TIMEOUT) {
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dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
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}
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outb_p(temp, SMBHSTSTS);
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}
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result = 0;
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END:
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if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
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@ -393,7 +424,10 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
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return -1;
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}
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outb_p(hwpec, SMBAUXCTL); /* enable/disable hardware PEC */
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if (hwpec) /* enable/disable hardware PEC */
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outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL);
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else
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outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL);
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if(block)
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ret = i801_block_transaction(data, read_write, size, hwpec);
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@ -405,7 +439,7 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
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/* Some BIOSes don't like it when PEC is enabled at reboot or resume
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time, so we forcibly disable it after every transaction. */
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if (hwpec)
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outb_p(0, SMBAUXCTL);
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outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL);
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if(block)
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return ret;
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