arm64: Expose FRINT capabilities to userspace
ARMv8.5 introduces the FRINT series of instructions for rounding floating point numbers to integers. Provide a capability to userspace in order to allow applications to determine if the system supports these instructions. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>alistair/sunxi64-5.4-dsi
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1201937491
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ca9503fc9e
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@ -227,6 +227,10 @@ HWCAP_PACG
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ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
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ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
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Documentation/arm64/pointer-authentication.txt.
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Documentation/arm64/pointer-authentication.txt.
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HWCAP2_FRINT
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Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
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4. Unused AT_HWCAP bits
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4. Unused AT_HWCAP bits
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-----------------------
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-----------------------
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@ -96,6 +96,7 @@
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#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
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#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
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#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
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#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
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#define KERNEL_HWCAP_FLAGM2 __khwcap2_feature(FLAGM2)
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#define KERNEL_HWCAP_FLAGM2 __khwcap2_feature(FLAGM2)
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#define KERNEL_HWCAP_FRINT __khwcap2_feature(FRINT)
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/*
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/*
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* This yields a mask that user programs can use to figure out what
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* This yields a mask that user programs can use to figure out what
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@ -560,6 +560,7 @@
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/* id_aa64isar1 */
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/* id_aa64isar1 */
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#define ID_AA64ISAR1_SB_SHIFT 36
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#define ID_AA64ISAR1_SB_SHIFT 36
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#define ID_AA64ISAR1_FRINTTS_SHIFT 32
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#define ID_AA64ISAR1_GPI_SHIFT 28
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#define ID_AA64ISAR1_GPI_SHIFT 28
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#define ID_AA64ISAR1_GPA_SHIFT 24
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#define ID_AA64ISAR1_GPA_SHIFT 24
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#define ID_AA64ISAR1_LRCPC_SHIFT 20
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#define ID_AA64ISAR1_LRCPC_SHIFT 20
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@ -64,5 +64,6 @@
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#define HWCAP2_SVESHA3 (1 << 5)
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#define HWCAP2_SVESHA3 (1 << 5)
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#define HWCAP2_SVESM4 (1 << 6)
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#define HWCAP2_SVESM4 (1 << 6)
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#define HWCAP2_FLAGM2 (1 << 7)
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#define HWCAP2_FLAGM2 (1 << 7)
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#define HWCAP2_FRINT (1 << 8)
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#endif /* _UAPI__ASM_HWCAP_H */
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#endif /* _UAPI__ASM_HWCAP_H */
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@ -1640,6 +1640,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FCMA_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FCMA),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FCMA_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FCMA),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FRINTTS_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FRINT),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_SB_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SB),
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HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_SB_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SB),
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HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_AT_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),
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HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_AT_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),
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#ifdef CONFIG_ARM64_SVE
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#ifdef CONFIG_ARM64_SVE
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@ -93,6 +93,7 @@ static const char *const hwcap_str[] = {
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"svesha3",
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"svesha3",
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"svesm4",
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"svesm4",
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"flagm2",
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"flagm2",
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"frint",
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NULL
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NULL
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};
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};
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