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firewire: Don't touch DMA descriptors after appending.

When a DMA descriptor is appended to the context we sync it for
DMA and the device might potentially read it immediately.  So,
we can't set the IRQ bits in the descriptor after appending.

Signed-off-by: Kristian Høgsberg <krh@redhat.com>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
hifive-unleashed-5.1
Kristian Høgsberg 2007-02-16 17:34:47 -05:00 committed by Stefan Richter
parent d2746dc192
commit cb2d2cdbc6
1 changed files with 6 additions and 6 deletions

View File

@ -1621,15 +1621,15 @@ ohci_queue_iso_receive_dualbuffer(struct fw_iso_context *base,
page_bus = page_private(buffer->pages[page]);
db->second_buffer = cpu_to_le32(page_bus + offset);
if (p->interrupt && length == rest)
db->control |= cpu_to_le16(descriptor_irq_always);
context_append(&ctx->context, d, z, header_z);
offset = (offset + length) & ~PAGE_MASK;
rest -= length;
page++;
}
if (p->interrupt)
db->control |= cpu_to_le16(descriptor_irq_always);
return 0;
}
@ -1668,6 +1668,9 @@ ohci_queue_iso_receive_bufferfill(struct fw_iso_context *base,
d->req_count = cpu_to_le16(length);
d->res_count = cpu_to_le16(length);
if (packet->interrupt && length == rest)
d->control |= cpu_to_le16(descriptor_irq_always);
context_append(&ctx->context, d, 1, 0);
offset = (offset + length) & ~PAGE_MASK;
@ -1675,9 +1678,6 @@ ohci_queue_iso_receive_bufferfill(struct fw_iso_context *base,
page++;
}
if (packet->interrupt)
d->control |= cpu_to_le16(descriptor_irq_always);
return 0;
}