[PATCH] zd1211rw: 16-bit writes for physical control registers
Caused by the fact that physical control registers appear to have only a width of 16 bit, 32-bit writes are not required. Signed-off-by: Ulrich Kunitz <kune@deine-taler.de> Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1181,7 +1181,7 @@ static int update_pwr_int(struct zd_chip *chip, u8 channel)
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u8 value = chip->pwr_int_values[channel - 1];
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dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_int %#04x\n",
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channel, value);
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return zd_iowrite32_locked(chip, value, CR31);
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return zd_iowrite16_locked(chip, value, CR31);
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}
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static int update_pwr_cal(struct zd_chip *chip, u8 channel)
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@ -1189,12 +1189,12 @@ static int update_pwr_cal(struct zd_chip *chip, u8 channel)
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u8 value = chip->pwr_cal_values[channel-1];
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dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_cal %#04x\n",
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channel, value);
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return zd_iowrite32_locked(chip, value, CR68);
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return zd_iowrite16_locked(chip, value, CR68);
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}
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static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
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{
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struct zd_ioreq32 ioreqs[3];
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struct zd_ioreq16 ioreqs[3];
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ioreqs[0].addr = CR67;
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ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1];
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@ -1206,7 +1206,7 @@ static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
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dev_dbg_f(zd_chip_dev(chip),
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"channel %d ofdm_cal 36M %#04x 48M %#04x 54M %#04x\n",
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channel, ioreqs[0].value, ioreqs[1].value, ioreqs[2].value);
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return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int update_channel_integration_and_calibration(struct zd_chip *chip,
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@ -1218,7 +1218,7 @@ static int update_channel_integration_and_calibration(struct zd_chip *chip,
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if (r)
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return r;
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if (chip->is_zd1211b) {
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static const struct zd_ioreq32 ioreqs[] = {
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static const struct zd_ioreq16 ioreqs[] = {
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{ CR69, 0x28 },
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{},
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{ CR69, 0x2a },
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@ -1230,7 +1230,7 @@ static int update_channel_integration_and_calibration(struct zd_chip *chip,
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r = update_pwr_cal(chip, channel);
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if (r)
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return r;
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r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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if (r)
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return r;
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}
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@ -1252,7 +1252,7 @@ static int patch_cck_gain(struct zd_chip *chip)
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if (r)
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return r;
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dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff);
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return zd_iowrite32_locked(chip, value & 0xff, CR47);
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return zd_iowrite16_locked(chip, value & 0xff, CR47);
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}
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int zd_chip_set_channel(struct zd_chip *chip, u8 channel)
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